Microchip Technology MCP3421DM-WS Data Sheet
PIC18F2455/2550/4455/4550
DS39632E-page 404
© 2009 Microchip Technology Inc.
TABLE 28-28: A/D CONVERTER CHARACTERISTICS: PIC18F2455/2550/4455/4550 (INDUSTRIAL)
PIC18LF2455/2550/4455/4550 (INDUSTRIAL)
FIGURE 28-23:
A/D CONVERSION TIMING
Param
No.
Symbol
Characteristic
Min
Typ
Max
Units
Conditions
A01
N
R
Resolution
—
—
10
bit
ΔV
REF
≥ 3.0V
A03
E
IL
Integral Linearity Error
—
—
<±1
LSB
ΔV
REF
≥ 3.0V
A04
E
DL
Differential Linearity Error
—
—
<±1
LSB
ΔV
REF
≥ 3.0V
A06
E
OFF
Offset Error
—
—
<±2.0
LSB
ΔV
REF
≥ 3.0V
A07
E
GN
Gain Error
—
—
<±1
LSB
ΔV
REF
≥ 3.0V
A10
—
Monotonicity
Guaranteed
(1)
—
V
SS
≤ V
AIN
≤ V
REF
A20
ΔV
REF
Reference Voltage Range
(V
(V
REFH
– V
REFL
)
1.8
3.0
3.0
—
—
—
V
DD
– V
SS
V
DD
– V
SS
V
V
V
V
DD
< 3.0V
V
DD
≥ 3.0V
A21
V
REFH
Reference Voltage High
Vss +
ΔV
REF
—
V
DD
V
A22
V
REFL
Reference Voltage Low
V
SS
—
V
DD
-
ΔV
REF
V
A25
V
AIN
Analog Input Voltage
V
REFL
—
V
REFH
V
A30
Z
AIN
Recommended Impedance of
Analog Voltage Source
Analog Voltage Source
—
—
2.5
k
Ω
A50
I
REF
V
REF
Input Current
(2)
—
—
—
—
—
—
5
150
μA
μA
μA
During V
AIN
acquisition.
During A/D conversion
cycle.
cycle.
Note 1: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
2: V
REFH
current is from RA3/AN3/V
REF
+ pin or V
DD
, whichever is selected as the V
REFH
source.
V
REFL
current is from RA2/AN2/V
REF
-/CV
REF
pin or V
SS
, whichever is selected as the V
REFL
source.
131
130
132
BSF ADCON0, GO
Q4
A/D CLK
A/D DATA
ADRES
ADIF
GO
SAMPLE
OLD_DATA
SAMPLING STOPPED
DONE
NEW_DATA
(Note 2)
9
8
7
3
2
1
Note 1:
If the A/D clock source is selected as RC, a time of T
CY
is added before the A/D clock starts.
This allows the SLEEP instruction to be executed.
2:
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
. . .
. . .
T
CY(1)
0
T
DIS