Microchip Technology DM164130-7 Data Sheet
PIC16(L)F1946/47
DS41414D-page 64
2010-2012 Microchip Technology Inc.
FIGURE 5-3:
QUARTZ CRYSTAL
OPERATION (LP, XT OR
HS MODE)
OPERATION (LP, XT OR
HS MODE)
FIGURE 5-4:
CERAMIC RESONATOR
OPERATION
(XT OR HS MODE)
OPERATION
(XT OR HS MODE)
5.2.1.3
Oscillator Start-up Timer (OST)
If the oscillator module is configured for LP, XT or HS
modes, the Oscillator Start-up Timer (OST) counts
1024 oscillations from OSC1. This occurs following a
Power-on Reset (POR) and when the Power-up Timer
(PWRT) has expired (if configured), or a wake-up from
Sleep. During this time, the program counter does not
increment and program execution is suspended. The
OST ensures that the oscillator circuit, using a quartz
crystal resonator or ceramic resonator, has started and
is providing a stable system clock to the oscillator
module.
In order to minimize latency between external oscillator
start-up and code execution, the Two-Speed Clock
Start-up mode can be selected (see
modes, the Oscillator Start-up Timer (OST) counts
1024 oscillations from OSC1. This occurs following a
Power-on Reset (POR) and when the Power-up Timer
(PWRT) has expired (if configured), or a wake-up from
Sleep. During this time, the program counter does not
increment and program execution is suspended. The
OST ensures that the oscillator circuit, using a quartz
crystal resonator or ceramic resonator, has started and
is providing a stable system clock to the oscillator
module.
In order to minimize latency between external oscillator
start-up and code execution, the Two-Speed Clock
Start-up mode can be selected (see
).
5.2.1.4
4x PLL
The oscillator module contains a 4x PLL that can be
used with both external and internal clock sources to
provide a system clock source. The input frequency for
the 4x PLL must fall within specifications. See the PLL
Clock Timing Specifications in
used with both external and internal clock sources to
provide a system clock source. The input frequency for
the 4x PLL must fall within specifications. See the PLL
Clock Timing Specifications in
The 4x PLL may be enabled for use by one of two
methods:
1.
methods:
1.
Program the PLLEN bit in Configuration Words
to a ‘1’.
to a ‘1’.
2.
Write the SPLLEN bit in the OSCCON register to
a ‘1’. If the PLLEN bit in Configuration Words is
programmed to a ‘1’, then the value of SPLLEN
is ignored.
a ‘1’. If the PLLEN bit in Configuration Words is
programmed to a ‘1’, then the value of SPLLEN
is ignored.
Note 1: Quartz crystal characteristics vary
according to type, package and
manufacturer. The user should consult the
manufacturer data sheets for specifications
and recommended application.
manufacturer. The user should consult the
manufacturer data sheets for specifications
and recommended application.
2: Always verify oscillator performance over
the V
DD
and temperature range that is
expected for the application.
3: For oscillator design assistance, reference
the following Microchip Applications Notes:
• AN826, “Crystal Oscillator Basics and
Crystal Selection for rfPIC
®
and PIC
®
Devices” (DS00826)
• AN849, “Basic PIC
®
Oscillator Design”
(DS00849)
• AN943, “Practical PIC
®
Oscillator
Analysis and Design” (DS00943)
• AN949, “Making Your Oscillator Work”
(DS00949)
Note 1: A series resistor (R
S
) may be required for
quartz crystals with low drive level.
2: The value of R
F
varies with the Oscillator mode
selected (typically between 2 M
to 10 M.
C1
C2
Quartz
R
S(1)
OSC1/CLKIN
R
F(2)
Sleep
To Internal
Logic
Logic
PIC
®
MCU
Crystal
OSC2/CLKOUT
Note 1: A series resistor (R
S
) may be required for
ceramic resonators with low drive level.
2: The value of R
F
varies with the Oscillator mode
selected (typically between 2 M
to 10 M.
3: An additional parallel feedback resistor (R
P
)
may be required for proper ceramic resonator
operation.
operation.
C1
C2 Ceramic
R
S(1)
OSC1/CLKIN
R
F(2)
Sleep
To Internal
Logic
Logic
PIC
®
MCU
R
P(3)
Resonator
OSC2/CLKOUT