Microchip Technology AC244049 Data Sheet

Page of 448
PIC16(L)F1825/1829
DS41440C-page 66
 2010-2012 Microchip Technology Inc.
5.4
Two-Speed Clock Start-up Mode
Two-Speed Start-up mode provides additional power
savings by minimizing the latency between external
oscillator start-up and code execution. In applications
that make heavy use of the Sleep mode, Two-Speed
Start-up will remove the external oscillator start-up
time from the time spent awake and can reduce the
overall power consumption of the device. This mode
allows the application to wake-up from Sleep, perform
a few instructions using the INTOSC internal oscillator
block as the clock source and go back to Sleep without
waiting for the external oscillator to become stable.
Two-Speed Start-up provides benefits when the
oscillator module is configured for LP, XT or HS
modes. The Oscillator Start-up Timer (OST) is enabled
for these modes and must count 1024 oscillations
before the oscillator can be used as the system clock
source. 
If the oscillator module is configured for any mode
other than LP, XT or HS mode, then Two-Speed
Start-up is disabled. This is because the external clock
oscillator does not require any stabilization time after
POR or an exit from Sleep.
If the OST count reaches 1024 before the device
enters Sleep mode, the OSTS bit of the OSCSTAT
register is set and program execution switches to the
external oscillator. However, the system may never
operate from the external oscillator if the time spent
awake is very short. 
5.4.1
TWO-SPEED START-UP MODE 
CONFIGURATION
Two-Speed Start-up mode is configured by the
following settings:
• IESO (of the Configuration Word 1) = 1; 
Internal/External Switchover bit (Two-Speed 
Start-up mode enabled).
• SCS (of the OSCCON register) = 00.
• FOSC<2:0> bits in the Configuration Word 1 
configured for LP, XT or HS mode.
Two-Speed Start-up mode is entered after:
• Power-on Reset (POR) and, if enabled, after 
Power-up Timer (PWRT) has expired, or
• Wake-up from Sleep.
TABLE 5-1:
OSCILLATOR SWITCHING DELAYS
Note:
Executing a SLEEP instruction will abort
the oscillator start-up time and will cause
the OSTS bit of the OSCSTAT register to
remain clear.
Note:
When FSCM is enabled, Two-Speed
Start-up will automatically be enabled.
Switch From
Switch To
Frequency
Oscillator Delay
Sleep/POR
LFINTOSC
(1)
MFINTOSC
(1)
HFINTOSC
(1)
31 kHz
31.25 kHz-500 kHz
31.25 kHz-16 MHz
Oscillator Warm-up Delay (T
WARM
)
Sleep/POR
EC, RC
(1)
DC – 32 MHz
2 cycles
LFINTOSC
EC, RC
(1)
DC – 32 MHz
1 cycle of each
Sleep/POR
Timer1 Oscillator
LP, XT, HS
(1)
32 kHz-20 MHz
1024 Clock Cycles (OST)
Any clock source
MFINTOSC
(1)
HFINTOSC
(1)
31.25 kHz-500 kHz
31.25 kHz-16 MHz
2
s (approx.)
Any clock source
LFINTOSC
(1)
31 kHz
1 cycle of each
Any clock source
Timer1 Oscillator
32 kHz
1024 Clock Cycles (OST)
PLL inactive
PLL active
16-32 MHz
2 ms (approx.)
Note 1:
PLL inactive.