Microchip Technology AC164331 Data Sheet
PAGE
23
Cu
rre
n
t An
alo
g
/In
te
rf
ac
e
Fa
mil
y
Pr
oduc
ts
L
o
w-Si
d
e
Driv
e
rs
, 1
.5
A
Pe
a
k
Ou
tp
u
t Cu
rre
n
t (c
o
n
tin
u
e
d
)
TC
42
7
Du
a
l,
No
n
-i
n
v
e
rtin
g
-4
0
to
+
8
5
1.
5
15
/1
0
18
50
/7
5
8
-P
in
PDI
P
,
8
-P
in
SOIC
TC
42
8
D
ua
l,
I
n
ve
rt
in
g
a
n
d
N
o
n-
in
v
e
rt
in
g
-4
0
t
o
+
8
5
1
.5
15
/1
0
1
8
5
0/
7
5
8-
P
in
PD
IP
,
8-
P
in
SO
IC
TC
44
04
Du
a
l,
In
v
e
rti
n
g
-4
0
to
+
8
5
1.
5
10
/1
0
18
15
/3
2
8
-P
in
PDI
P
,
8
-P
in
SOIC
TC
44
05
D
u
a
l,
N
o
n-
in
v
e
rt
in
g
-4
0
t
o
+
8
5
1
.5
10
/1
0
1
8
1
5/
3
2
8-
P
in
PD
IP
,
8-
P
in
SO
IC
L
o
w-Si
d
e
Driv
e
rs
, 2
.0
A
to
1
2
.0
A Pe
a
k
Ou
tp
u
t Cu
rre
n
t
TC
14
12
S
ingl
e
, I
n
ve
rt
in
g
-4
0
to
+
8
5
2
6/
6
16
35
/3
5
8
-P
in
PDI
P
,
8
-P
in
SOIC
, 8
-Pin
MSOP
T
C
1
4
1
2
N
S
ingl
e
, N
o
n
-i
n
ver
ti
n
g
-40
t
o
+
8
5
2
6/
6
1
6
3
5
/35
8
-Pi
n P
D
IP
,
8
-Pi
n S
O
IC
, 8-
P
in M
S
O
P
TC
14
13
S
ingl
e
, I
n
ve
rt
in
g
-4
0
to
+
8
5
3
4/
4
16
35
/3
5
8
-P
in
PDI
P
,
8
-P
in
SOIC
, 8
-Pin
MSOP
T
C
1
4
1
3
N
S
ingl
e
, N
o
n
-i
n
ver
ti
n
g
-40
t
o
+
8
5
3
4/
4
1
6
3
5
/35
8
-Pi
n P
D
IP
,
8
-Pi
n S
O
IC
, 8-
P
in M
S
O
P
TC
44
23
A
Du
a
l,
In
v
e
rti
n
g
-4
0
to
+1
2
5
3
3
(t
y
p
)/4
(ty
p
)
18
4
0
(t
y
p
)/4
0
(ty
p
)
8
-Pi
n P
D
IP
,
8
-Pi
n S
O
IC
, 8-
P
in D
F
N
T
C
4
4
2
4
A
D
u
a
l,
No
n
-i
n
v
e
rtin
g
-4
0
to
+1
2
5
3
3
(t
y
p
)/4
(ty
p
)
1
8
4
0
(t
y
p
)/4
0
(ty
p
)
8
-P
in
P
D
IP
,
8
-P
in
S
OIC
, 8
-P
in
DF
N
TC
44
25
A
D
u
al
, I
n
v
e
rt
in
g an
d N
o
n
-i
n
ver
ti
n
g
-4
0
to
+1
2
5
3
3
(t
y
p
)/4
(ty
p
)
18
4
0
(t
y
p
)/4
0
(ty
p
)
8
-Pi
n P
D
IP
,
8
-Pi
n S
O
IC
, 8-
P
in D
F
N
T
C
4
4
2
3
Du
a
l,
In
v
e
rti
n
g
-4
0
to
+1
2
5
3
5
/5
1
8
3
3
/3
8
8
-P
in
PDI
P
,
1
6
-Pi
n
S
OIC (
W
),
8
-P
in
DF
N
TC
44
24
Du
a
l,
No
n
-i
n
v
e
rtin
g
-4
0
to
+1
2
5
3
5/
5
18
33
/3
8
8
-P
in
PDI
P
,
1
6
-Pi
n
S
OIC (
W
),
8
-P
in
DF
N
T
C
4
4
2
5
Du
a
l,
In
v
e
rti
n
g
a
n
d
No
n
-i
n
v
e
rti
n
g
-4
0
to
+1
2
5
3
5
/5
1
8
3
3
/3
8
8
-P
in
PDI
P
,
1
6
-Pi
n
S
OIC (
W
),
8
-P
in
DF
N
TC
42
9
S
ingl
e
, I
n
ve
rt
in
g
-4
0
to
+
8
5
6
2
.5/
2.
5
18
53
/6
0
8
-Pi
n P
D
IP
,
8
-Pi
n D
F
N
, 8-
P
in
SO
IC
T
C
4
4
2
0
Sin
g
le
, No
n
-i
n
v
e
rtin
g
-4
0
to
+1
2
5
6
2
.8
/2
.5
1
8
5
5
/5
5
8
-P
in
PDI
P
,
8
-P
in
SOIC
, 5
-Pin
T
O
-2
2
0
, 8
-Pin
DF
N
TC
44
29
S
ingl
e
, I
n
ve
rt
in
g
-4
0
to
+1
2
5
6
2
.8/
2.
5
18
55
/5
5
8
-Pi
n P
D
IP
,
8
-Pi
n S
O
IC
, 5-
P
in T
O
-2
20
, 8-
P
in D
F
N
TC
44
21
Si
n
g
le,
I
n
v
e
rt
in
g
-40
t
o
+
1
25
9
1
.4
(
ty
p
)/
1.
7
1
8
3
0/
3
3
8-
P
in
PD
IP
,
5-
P
in
T
O
-2
2
0
,
8-
P
in
D
F
N
TC
44
21
A
S
ingl
e
, I
n
ve
rt
in
g
-4
0
to
+1
2
5
9
1.
25
(
ty
p
)/
1
.5
18
38
/4
2
8
-Pi
n P
D
IP
,
8
-Pi
n S
O
IC
, 5-
P
in T
O
-2
20
,
8-
P
in
6x
5
D
F
N
TC
44
22
Si
n
g
le,
N
o
n-
in
v
e
rt
in
g
-40
t
o
+
1
25
9
1
.4
(
ty
p
)/
1.
7
1
8
3
0/
3
3
8-
P
in
PD
IP
,
5-
P
in
T
O
-2
2
0
,
8-
P
in
D
F
N
TC
44
22
A
Si
n
g
le,
N
o
n-
in
v
e
rt
in
g
-4
0
to
+1
2
5
9
1.
25
(
ty
p
)/
1
.5
18
38
/4
2
8
-Pi
n P
D
IP
,
8
-Pi
n S
O
IC
, 5-
P
in T
O
-2
20
,
8-
P
in
6x
5
D
F
N
TC
44
51
Si
n
g
le,
I
n
v
e
rt
in
g
-40
t
o
+
1
25
1
2
0
.6
(t
y
p
)/
1.
5
1
8
1
5/
1
5
8
-Pi
n S
O
IC
, 8-
P
in
PD
IP
, 8-
P
in 6x5
D
F
N
,
5
-Pi
n TO
-2
20
,
5
-Pi
n D
D
P
A
K
TC
44
52
Si
n
g
le,
N
o
n-
in
v
e
rt
in
g
-4
0
to
+1
2
5
12
0
.6
(ty
p
)/
1
.5
18
15
/1
5
8
-Pi
n S
O
IC
, 8-
P
in
PD
IP
, 8-
P
in 6x5
D
F
N
,
5
-Pi
n TO
-2
20
,
5
-Pi
n D
D
P
A
K
Hig
h
-S
id
e
/L
o
w-Si
d
e
Driv
e
rs
T
C
4
6
2
6
Sin
g
le
, In
v
e
rti
n
g
-4
0
t
o
+8
5
1
.5
1
5
/1
0
6
3
5
/4
5
8
-P
in
PDI
P
,
1
6
-Pi
n
S
OIC (
W
)
TC
46
27
Si
n
g
le,
N
o
n-
in
v
e
rt
in
g
-4
0
to
+
8
5
1.
5
15
/1
0
6
35
/4
5
8
-P
in
PDI
P
,
1
6
-Pi
n
S
OIC (
W
)
TC
44
31
Si
n
g
le,
I
n
v
e
rt
in
g
-4
0
t
o
+
8
5
1
.5
10
/1
0
3
0
6
2/
7
8
8-
P
in
PD
IP
,
8-
P
in
SO
IC
TC
44
32
Si
n
g
le,
N
o
n-
in
v
e
rt
in
g
-4
0
to
+
8
5
1.
5
10
/1
0
30
62
/7
8
8
-P
in
PDI
P
,
8
-P
in
SOIC
POWER MANAG
EMENT –
Powe
r MO
SFET Driv
e
rs
(c
onti
nue
d
)
P
a
rt
#
C
on
fi
gu
ra
ti
on
Op
e
ra
tin
g
T
e
m
p
er
a
tu
re
Ra
n
g
e
(°
C)
Pe
ak
O
u
tp
u
t
C
u
rre
n
t (A
)
O
u
tp
u
t R
e
si
st
an
ce
(R
H
/R
L
)
(Ma
x
.
Ω
@
25°
C
)
M
a
x.
Su
pp
ly
V
o
lt
ag
e
(V
)
In
p
u
t/
Ou
tp
u
t
De
la
y
(t
d
1
, t
d
2
)
(1)
(n
s
)
Pa
ck
ag
es
NOTE
1
:
*t
D
1
= d
e
la
y
time
fro
m
in
p
u
t lo
w-to
-h
ig
h
t
ra
n
s
it
io
n
to
o
u
tp
u
t tra
n
s
itio
n
. t
D
2
=
de
la
y t
im
e
f
rom
i
n
put
hi
gh-
to
-l
ow
t
ra
n
s
it
ion
to
out
put
t
ra
n
s
it
io
n
.