Microchip Technology AC244045 Data Sheet

 2010-2012 Microchip Technology Inc.

DS41440C-page 165

In order for the DAC module to consume the least
amount of power, one of the two voltage reference input
sources to the resistor ladder must be disconnected.
Either the positive voltage source, (V

SOURCE

+), or the

negative voltage source, (V

SOURCE

-) can be disabled.

The negative voltage source is disabled by setting the
DACLPS bit in the DACCON0 register. Clearing the
DACLPS bit in the DACCON0 register disables the
positive voltage source.

17.4.1

OUTPUT CLAMPED TO POSITIVE 
VOLTAGE SOURCE

The DAC output voltage can be set to V

SOURCE

+ with

the least amount of power consumption by performing
the following:
• Clearing the DACEN bit in the DACCON0 register.
• Setting the DACLPS bit in the DACCON0 register.
• Configuring the DACPSS bits to the proper 

positive source. 

• Configuring the DACR<4:0> bits to ‘11111’ in the 

DACCON1 register.

This is also the method used to output the voltage level
from the FVR to an output pin. See 

 for more information.

Reference 

 for output clamping examples.

17.4.2

OUTPUT CLAMPED TO NEGATIVE 
VOLTAGE SOURCE

The DAC output voltage can be set to V

SOURCE

- with

the least amount of power consumption by performing
the following:
• Clearing the DACEN bit in the DACCON0 register.
• Clearing the DACLPS bit in the DACCON0 register.
• Configuring the DACNSS bits to the proper 

negative source. 

• Configuring the DACR<4:0> bits to ‘00000’ in the 

DACCON1 register.

This allows the comparator to detect a zero-crossing
while not consuming additional current through the DAC
module.
Reference 

 for output clamping examples.

When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the DACCON0 register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.

A device Reset affects the following:
• DAC is disabled.
• DAC output voltage is removed from the 

DACOUT pin.

• The DACR<4:0> range select bits are cleared.

R

R

R

DAC Voltage Ladder
(see 

V

SRC

+

DACEN = 0

DACLPS = 1

DACR<4:0> = 11111

V

SRC

-

R

R

R

DAC Voltage Ladder
(see 

V

SRC

+

DACEN = 0

DACLPS = 0

DACR<4:0> = 00000

V

SRC

-