Microchip Technology AC244045 Data Sheet

Page of 448
PIC16(L)F1825/1829
DS41440C-page 274
 2010-2012 Microchip Technology Inc.
25.6.4
I
2
C MASTER MODE START 
CONDITION TIMING
To initiate a Start condition (
), the user
sets the Start Enable bit, SEN bit of the SSPxCON2
register. If the SDAx and SCLx pins are sampled high,
the Baud Rate Generator is reloaded with the contents
of SSPxADD<7:0> and starts its count. If SCLx and
SDAx are both sampled high when the Baud Rate
Generator times out (T
BRG
), the SDAx pin is driven
low. The action of the SDAx being driven low while
SCLx is high is the Start condition and causes the S bit
of the SSPxSTAT1 register to be set. Following this,
the Baud Rate Generator is reloaded with the contents
of SSPxADD<7:0> and resumes its count. When the
Baud Rate Generator times out (T
BRG
), the SEN bit of
the SSPxCON2 register will be automatically cleared
by hardware; the Baud Rate Generator is suspended,
leaving the SDAx line held low and the Start condition
is complete.
FIGURE 25-26:
FIRST START BIT TIMING    
Note 1:
If at the beginning of the Start condition,
the SDAx and SCLx pins are already
sampled low, or if during the Start
condition, the SCLx line is sampled low
before the SDAx line is driven low, a bus
collision occurs, the Bus Collision
Interrupt Flag, BCLxIF, is set, the Start
condition is aborted and the I
2
C module is
reset into its Idle state.
2:
The Philips I
2
C™ Specification states that
a bus collision cannot occur on a Start.
SDAx
SCLx
S
T
BRG
1st bit
2nd bit
T
BRG
SDAx = 1, 
At completion of Start bit,
SCLx = 1
Write to SSPxBUF occurs here
T
BRG
hardware clears SEN bit
T
BRG
Write to SEN bit occurs here
Set S bit (SSPxSTAT<3>)
    and sets SSPxIF bit