Microchip Technology AC244045 Data Sheet
PIC16(L)F1825/1829
DS41440C-page 286
2010-2012 Microchip Technology Inc.
TABLE 25-3:
SUMMARY OF REGISTERS ASSOCIATED WITH I
2
C™ OPERATION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values on
Page
INLVLA
—
—
INLVLA5
(1)
INLVLA4
INLVLA3
(2)
INLVLA2
INLVLA1
INLVLA0
INLVLB
(1)
INLVLB7
INLVLB6
INLVLB5
INLVLB4
—
—
—
—
INLVLC
INLVLC7
(1)
INLVLC6
(1)
INLVLC5
INLVLC4
INLVLC3
(2)
INLVLC2
(2)
INLVLC1
INLVLC0
INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF
PIE1
TMR1GIE
ADIE
RCIE
TXIE
SSP1IE
CCP1IE
TMR2IE
TMR1IE
PIE2
OSFIE
C2IE
C1IE
EEIE
BCL1IE
—
—
CCP2IE
PIR1
TMR1GIF
ADIF
RCIF
TXIF
SSP1IF
CCP1IF
TMR2IF
TMR1IF
PIR2
OSFIF
C2IF
C1IF
EEIF
BCL1IF
—
—
CCP2IF
SSP1ADD
ADD7
ADD6
ADD5
ADD4
ADD3
ADD2
ADD1
ADD0
SSP1BUF
Synchronous Serial Port Receive Buffer/Transmit Register
SSP1CON1
WCOL
SSPOV
SSPEN
CKP
SSPM<3:0>
SSP1CON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
SSP1CON3
ACKTIM
PCIE
SCIE
BOEN
SDAHT
SBCDE
AHEN
DHEN
SSP1MSK
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
MSK0
SSP1STAT
SMP
CKE
D/A
P
S
R/W
UA
BF
TRISA
—
—
TRISA5
(1)
TRISA4
TRISA3
(2)
TRISA2
TRISA1
TRISA0
TRISB
(1)
TRISB7
TRISB6
TRISB5
TRISB4
—
—
—
—
TRISC
TRISC7
(1)
TRISC6
(1)
TRISC5
TRISC4
TRISC3
(2)
TRISC2
(2)
TRISC1
TRISC0
Legend:
— Unimplemented location, read as ‘0’. Shaded cells are not used by the MSSP module in I
2
C™ mode.
* Page provides register information.
Note
1:
PIC16(L)F1829 only.
2:
PIC16(L)F1825 only.