Microchip Technology AC244045 Data Sheet
PIC16(L)F1825/1829
DS41440C-page 52
2010-2012 Microchip Technology Inc.
REGISTER 4-2:
CONFIGURATION WORD 2
R/P-1/1
R/P-1/1
U-1
R/P-1/1
R/P-1/1
R/P-1/1
LVP
(1)
DEBUG
(2)
—
BORV
STVREN
PLLEN
bit 13
bit 8
U-1
U-1
U-1
R-1
U-1
U-1
R/P-1/1
R/P-1/1
—
—
—
Reserved
—
—
WRT<1:0>
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘1’
‘0’ = Bit is cleared
‘1’ = Bit is set
-n = Value when blank or after Bulk Erase
Legend:
bit 13
LVP: Low-Voltage Programming Enable bit
(1)
1 = Low-voltage programming enabled
0 = High-voltage on MCLR must be used for programming
0 = High-voltage on MCLR must be used for programming
bit 12
DEBUG: In-Circuit Debugger Mode bit
(2)
1 = In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins
0 = In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger
0 = In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger
bit 11
Unimplemented: Read as ‘1’
bit 10
BORV: Brown-out Reset Voltage Selection bit
(3)
1 = Brown-out Reset voltage (
), low trip point selected
0 = Brown-out Reset voltage (
), high trip point selected
bit 9
STVREN: Stack Overflow/Underflow Reset Enable bit
1 = Stack Overflow or Underflow will cause a Reset
0 = Stack Overflow or Underflow will not cause a Reset
1 = Stack Overflow or Underflow will cause a Reset
0 = Stack Overflow or Underflow will not cause a Reset
bit 8
PLLEN: PLL Enable bit
1 = 4xPLL enabled
0 = 4xPLL disabled
1 = 4xPLL enabled
0 = 4xPLL disabled
bit 7-5
Unimplemented: Read as ‘1’
bit 4
Reserved: This location should be programmed to a ‘1’.
bit 3-2
Unimplemented: Read as ‘1’
bit 1-0
WRT<1:0>: Flash Memory Self-Write Protection bits
11 = Write protection off
10 = 000h to 1FFh write-protected, 200h to FFFh may be modified by EECON control
01 = 000h to 7FFh write-protected, 800h to FFFh may be modified by EECON control
00 = 000h to FFFh write-protected, no addresses may be modified by EECON control
11 = Write protection off
10 = 000h to 1FFh write-protected, 200h to FFFh may be modified by EECON control
01 = 000h to 7FFh write-protected, 800h to FFFh may be modified by EECON control
00 = 000h to FFFh write-protected, no addresses may be modified by EECON control
Note 1:
The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP.
2:
The DEBUG bit in Configuration Word is managed automatically by device development tools including debuggers and
programmers. For normal device operation, this bit should be maintained as a ‘1’.
programmers. For normal device operation, this bit should be maintained as a ‘1’.
3:
parameter for specific trip point voltages.