Microchip Technology AC244045 Data Sheet
2010-2012 Microchip Technology Inc.
DS41440C-page 67
PIC16(L)F1825/1829
5.4.2
TWO-SPEED START-UP
SEQUENCE
SEQUENCE
1.
Wake-up from Power-on Reset or Sleep.
2.
Instructions begin execution by the internal
oscillator at the frequency set in the IRCF<3:0>
bits of the OSCCON register.
oscillator at the frequency set in the IRCF<3:0>
bits of the OSCCON register.
3.
OST enabled to count 1024 clock cycles.
4.
OST timed out, wait for falling edge of the
internal oscillator.
internal oscillator.
5.
OSTS is set.
6.
System clock held low until the next falling edge
of new clock (LP, XT or HS mode).
of new clock (LP, XT or HS mode).
7.
System clock is switched to external clock
source.
source.
5.4.3
CHECKING TWO-SPEED CLOCK
STATUS
STATUS
Checking the state of the OSTS bit of the OSCSTAT
register will confirm if the microcontroller is running
from the external clock source, as defined by the
FOSC<2:0> bits in the Configuration Word 1, or the
internal oscillator.
register will confirm if the microcontroller is running
from the external clock source, as defined by the
FOSC<2:0> bits in the Configuration Word 1, or the
internal oscillator.
FIGURE 5-8:
TWO-SPEED START-UP
0
1
1022 1023
PC + 1
T
OST
T
INTOSC
OSC1
OSC2
Program Counter
System Clock
PC - N
PC