Microchip Technology AC162060 Data Sheet

Page of 152
© 2005 Microchip Technology Inc.
DS30177T-page 11
Software
dsPIC30F DSP Library
The dsPIC30F DSP Library provides a set of 
speed-optimized functions for the most common digital 
signal processing applications. The DSP Library 
provides significant performance savings over 
equivalent functions coded in ‘C’ and allows 
developers to dramatically shorten their development 
time. 
The DSP Library is written predominantly in Assembly 
language and makes extensive use of the dsPIC30F 
DSC instruction set and hardware resources, including 
X and Y memory addressing, modulo addressing, 
bit-reversed addressing, 9.31 saturation and REPEAT 
and DO loops. It provides functions for
 
vector, matrix, 
filtering, transform and window operations.
Features
• 49 total functions
• Full compliance with the Microchip dsPIC30F C30 
Compiler, Assembler and Linker
• Simple user interface – just one library file and one 
header file
• Functions are both ‘C’ and Assembly callable
• FIR filtering functions include support for Lattice, 
Decimating, Interpolating and LMS filters
• IIR filtering functions include support for Canonic, 
Transposed Canonic and Lattice filters
• FIR and IIR functions may be used with the filter files 
generated by the dsPIC
®
 DSC Digital Filter Design 
Tool
• Transform functions include support for in-place and 
out-of-place DCT, FFT and IFFT transforms
• Window functions include support for Bartlett, 
Blackman, Hamming, Hanning and Kaiser windows
• Support for Program Space Visibility
• Complete function profile information, including 
register usage, cycle count and function size 
information
Function Execution Times Table
Function
Cycle Count Equation
Conditions
Number of Cycles*
Execution Time @ 30 MIPS
Complex FFT**
N = 64
3739
124.6 
μs
Complex FFT**
N =1 28
8485
282.8 
μs
Complex FFT**
N = 256
19055
635.2 
μs
Block FIR
53 + N(4 + M)
N = 32, M = 32
1205
40.2 
μs
Block FIR Lattice
41 + N(4 + 7M)
N = 32, M = 32
7337
244.6 
μs
Block IIR Canonic
36 + N(8 + 7S)
N = 32, S = 4
1188
39.6 
μs
Block IIR Lattice
46 + N(16 + 7M)
N = 32, M = 8
2350
78.3 
μs
Matrix Add
20 + 3(C * R)
C = 8, R = 8
212
7.1 
μs
Matrix Transpose
16 + C(6 + 3(R – 1))
C = 8, R = 8
232
7.7 
μs
Vector Dot Product
17 + 3N
N = 32
113
3.8 
μs
Vector Max
19 + 7(N – 2)
N = 32
229
7.6 
μs
Vector Multiply
17 + 4N
N = 32
145
4.8 
μs
Vector Power
16 + 2N
N = 32
80
2.7 
μs
Legend: C = # columns, N = # samples, M = # taps, S = # sections, R = # rows
*
1 Cycle = 33 nanoseconds @ 30 MIPS.
**
Complex FFT routine inherently prevents overflow.
Ordering Information:
SW300022
dsPIC30F DSP Library (Free download: www.microchip.com)
DS51443
“dsPIC30F DSP Library Product Overview” (Available at: www.microchip.com)
FREE