Microchip Technology MA160014 Data Sheet

DS41412F-page 136

 2010-2012 Microchip Technology Inc.

RA0/C12IN0-/AN0

RA0

0

0

O

DIG

LATA<0> data output; not affected by analog input.

1

0

I

TTL

PORTA<0> data input; disabled when analog input 
enabled.

C12IN0-

1

1

I

AN

Comparators C1 and C2 inverting input.

AN0

1

1

I

AN

Analog input 0.

RA1/C12IN1-/AN1

RA1

0

0

O

DIG

LATA<1> data output; not affected by analog input.

1

0

I

TTL

PORTA<1> data input; disabled when analog input 
enabled.

C12IN1-

1

1

I

AN

Comparators C1 and C2 inverting input.

AN1

1

1

I

AN

Analog input 1.

RA2/C2IN+/AN2/
DACOUT/V

REF

-

RA2

0

0

O

DIG

LATA<2> data output; not affected by analog input; disabled 
when DACOUT enabled.

1

0

I

TTL

PORTA<2> data input; disabled when analog input 
enabled; disabled when DACOUT enabled.

C2IN+

1

1

I

AN

Comparator C2 non-inverting input.

AN2

1

1

I

AN

Analog output 2.

DACOUT

x

1

O

AN

DAC Reference output.

V

REF

-

1

1

I

AN

A/D reference voltage (low) input. 

RA3/C1IN+/AN3/
V

REF

+

RA3

0

O

DIG

LATA<3> data output; not affected by analog input.

1

0

I

TTL

PORTA<3> data input; disabled when analog input 
enabled.

C1IN+

1

1

I

AN

Comparator C1 non-inverting input.

AN3

1

1

I

AN

Analog input 3.

V

REF

+

1

1

I

AN

A/D reference voltage (high) input.

RA4/CCP5/
C1OUT/SRQ/
T0CKI

RA4

0

—

O

DIG

LATA<4> data output.

1

—

I

ST

PORTA<4> data input; default configuration on POR.

CCP5

0

—

O

DIG

CCP5 Compare output/PWM output, takes priority over 
RA4 output.

1

—

I

ST

Capture 5 input/Compare 5 output/ PWM 5 output.

C1OUT

0

—

O

DIG

Comparator C1 output. 

SRQ

0

—

O

DIG

SR latch Q output; take priority over CCP 5 output.

T0CKI

1

—

I

ST

Timer0 external clock input.

RA5/C2OUT/
SRNQ/SS1/
HLVDIN/AN4

RA5

0

0

O

DIG

LATA<5> data output; not affected by analog input.

1

0

I

TTL

PORTA<5> data input; disabled when analog input 
enabled.

C2OUT

0

0

O

DIG

Comparator C2 output.

SRNQ

0

0

O

DIG

SR latch Q output.

SS1

1

0

I

TTL

SPI slave select input (MSSP1).

HLVDIN

1

1

I

AN

High/Low-Voltage Detect input.

AN4

1

1

I

AN

A/D input 4.

AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; 
CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I

2

C

TM

 =

 

Schmitt Trigger input 

with I

2

C.