Microchip Technology MA160014 Data Sheet

Page of 560
PIC18(L)F2X/4XK22
DS41412F-page 148
 2010-2012 Microchip Technology Inc.
10.5
PORTD Registers
PORTD is an 8-bit wide, bidirectional port. The
corresponding data direction register is TRISD. Setting
a TRISD bit (= 1) will make the corresponding PORTD
pin an input (i.e., disable the output driver). Clearing a
TRISD bit (= 0) will make the corresponding PORTD
pin an output (i.e., enable the output driver and put the
contents of the output latch on the selected pin).
The Data Latch register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register read and write the latched output value for
PORTD.
All pins on PORTD are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
All of the PORTD pins are multiplexed with analog and
digital peripheral modules. See 
.
EXAMPLE 10-4:
INITIALIZING PORTD      
10.5.1
PORTD OUTPUT PRIORITY
Each PORTD pin is multiplexed with other functions.
The pins, their combined functions and their output
priorities are briefly described here. For additional
information, refer to the appropriate section in this data
sheet.
When multiple outputs are enabled, the actual pin
control goes to the peripheral with the higher priority.
 lists the PORTD pin functions from the
highest to the lowest priority.
Analog input functions, such as ADC, comparator and
SR latch inputs, are not shown in the priority lists.
These inputs are active when the I/O pin is set for
Analog mode using the ANSELx registers. Digital
output functions may control the pin when it is in Analog
mode with the priority shown below.
Note:
PORTD is only available on 40-pin and
44-pin devices.
Note:
On a Power-on Reset, these pins are
configured as analog inputs.
MOVLB
0xF
; Set BSR for banked SFRs
CLRF
PORTD
; Initialize PORTD by
 
; clearing output
 
; data latches
CLRF
LATD
; Alternate method
; to clear output
; data latches
MOVLW
0CFh
; Value used to 
; initialize data 
; direction
MOVWF
TRISD
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
MOVLW
30h
; Value used to
; enable digital inputs
MOVWF
ANSELD
; RD<3:0> dig input enable
; RC<7:6> dig input enable