Microchip Technology MA160014 Data Sheet
2010-2012 Microchip Technology Inc.
DS41412F-page 153
PIC18(L)F2X/4XK22
10.7
Port Analog Control
Most port pins are multiplexed with analog functions
such as the Analog-to-Digital Converter and
comparators. When these I/O pins are to be used as
analog inputs it is necessary to disable the digital input
buffer to avoid excessive current caused by improper
biasing of the digital input. Individual control of the
digital input buffers on pins which share analog
functions is provided by the ANSELA, ANSELB,
ANSELC, ANSELD and ANSELE registers. Setting an
ANSx bit high will disable the associated digital input
buffer and cause all reads of that pin to return ‘0’ while
allowing analog functions of that pin to operate
correctly.
such as the Analog-to-Digital Converter and
comparators. When these I/O pins are to be used as
analog inputs it is necessary to disable the digital input
buffer to avoid excessive current caused by improper
biasing of the digital input. Individual control of the
digital input buffers on pins which share analog
functions is provided by the ANSELA, ANSELB,
ANSELC, ANSELD and ANSELE registers. Setting an
ANSx bit high will disable the associated digital input
buffer and cause all reads of that pin to return ‘0’ while
allowing analog functions of that pin to operate
correctly.
The state of the ANSx bits has no affect on digital
output functions. A pin with the associated TRISx bit
clear and ANSx bit set will still operate as a digital
output but the input mode will be analog. This can
cause unexpected behavior when performing read-
modify-write operations on the affected port.
output functions. A pin with the associated TRISx bit
clear and ANSx bit set will still operate as a digital
output but the input mode will be analog. This can
cause unexpected behavior when performing read-
modify-write operations on the affected port.
All ANSEL register bits default to ‘1’ upon POR and
BOR, disabling digital inputs for their associated port
pins. All TRIS register bits default to ‘1’ upon POR or
BOR, disabling digital outputs for their associated port
pins. As a result, all port pins that have an ANSEL
register will default to analog inputs upon POR or BOR.
BOR, disabling digital inputs for their associated port
pins. All TRIS register bits default to ‘1’ upon POR or
BOR, disabling digital outputs for their associated port
pins. As a result, all port pins that have an ANSEL
register will default to analog inputs upon POR or BOR.
10.8
Port Slew Rate Control
The output slew rate of each port is programmable to
select either the standard transition rate or a reduced
transition rate of approximately 0.1 times the standard
to minimize EMI. The reduced transition time is the
default slew rate for all ports.
select either the standard transition rate or a reduced
transition rate of approximately 0.1 times the standard
to minimize EMI. The reduced transition time is the
default slew rate for all ports.
10.9
Register Definitions – Port Control
TABLE 10-16: CONFIGURATION REGISTERS ASSOCIATED WITH PORTE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
CONFIG3H
MCLRE
—
P2BMX
T3CMX
HFOFST
CCP3MX
PBADEN
CCP2MX
CONFIG4L
DEBUG
XINST
—
—
—
LVP
(1)
—
STRVEN
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for Interrupts.
Note 1:
Can only be changed when in high voltage programming mode.
REGISTER 10-1:
PORTX
(1)
: PORTx REGISTER
R/W-u/x
R/W-u/x
R/W-u/x
R/W-u/x
R/W-u/x
R/W-u/x
R/W-u/x
R/W-u/x
Rx7
Rx6
Rx5
Rx4
Rx3
Rx2
Rx1
Rx0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-0
Rx<7:0>: PORTx I/O bit values
(2)
Note 1:
Register Description for PORTA, PORTB, PORTC and PORTD.
2:
Writes to PORTx are written to corresponding LATx register. Reads from PORTx register is return of I/O
pin values.
pin values.