Microchip Technology MA160014 Data Sheet

Page of 560
PIC18(L)F2X/4XK22
DS41412F-page 182
 2010-2012 Microchip Technology Inc.
 
PIE2
OSCFIE
C1IE
C2IE
EEIE
BCL1IE
HLVDIE
TMR3IE
CCP2IE
PIE4
CCP5IE
CCP4IE
CCP3IE
PIR1
ADIF
RC1IF
TX1IF
SSP1IF
CCP1IF
TMR2IF
TMR1IF
PIR2
OSCFIF
C1IF
C2IF
EEIF
BCL1IF
HLVDIF
TMR3IF
CCP2IF
PIR4
CCP5IF
CCP4IF
CCP3IF
PMD0
UART2MD
UART1MD
TMR6MD
TMR5MD
TMR4MD
TMR3MD
TMR2MD
TMR1MD
PMD1
MSSP2MD
MSSP1MD
CCP5MD
CCP4MD
CCP3MD
CCP2MD
CCP1MD
T1CON
TMR1CS<1:0>
T1CKPS<1:0>
T1SOSCEN
T1SYNC
T1RD16
TMR1ON
T1GCON
TMR1GE
T1GPOL
T1GTM
T1GSPM
T1GGO/DONE
T1GVAL
T1GSS<1:0>
T3CON
TMR3CS<1:0>
T3CKPS<1:0>
T3SOSCEN
T3SYNC
T3RD16
TMR3ON
T3GCON
TMR3GE
T3GPOL
T3GTM
T3GSPM
T3GGO/DONE
T3GVAL
T3GSS<1:0>
T5CON
TMR5CS<1:0>
T5CKPS<1:0>
T5SOSCEN
T5SYNC
T5RD16
TMR5ON
T5GCON
TMR5GE
T5GPOL
T5GTM
T5GSPM
T5GGO/DONE
T5GVAL
T5GSS<1:0>
TMR1H
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
TMR1L
Least Significant Byte of the 16-bit TMR1 Register
TMR3H
Holding Register for the Most Significant Byte of the 16-bit TMR3 Register
TMR3L
Least Significant Byte of the 16-bit TMR3 Register
TMR5H
Holding Register for the Most Significant Byte of the 16-bit TMR5 Register
TMR5L
Least Significant Byte of the 16-bit TMR5 Register
TRISA
TRISA7
TRISA6
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
TRISB
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
TRISB0
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
TRISD
(1)
TRISD7
TRISD6
TRISD5
TRISD4
TRISD3
TRISD2
TRISD1
TRISD0
TRISE
WPUE3
TRISE2
(1)
TRISE1
(1)
TRISE0
(1)
TABLE 14-3:
REGISTERS ASSOCIATED WITH CAPTURE (CONTINUED)
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register 
on Page
Legend:  — = Unimplemented location, read as ‘0’. Shaded bits are not used by Capture mode.
Note
1:
These registers/bits are available on PIC18(L)F4XK22 devices.
TABLE 14-4:
CONFIGURATION REGISTERS ASSOCIATED WITH CAPTURE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register 
on Page
CONFIG3H
MCLRE
P2BMX
T3CMX
HFOFST
CCP3MX
PBADEN
CCP2MX
Legend:  — = Unimplemented location, read as ‘0’. Shaded bits are not used by Capture mode.