Microchip Technology MA160014 Data Sheet

 2010-2012 Microchip Technology Inc.

DS41412F-page 217

15.2.3

SPI MASTER MODE

The master can initiate the data transfer at any time
because it controls the SCKx line. The master
determines when the slave (Processor 2, 

)

is to broadcast data by the software protocol.

In Master mode, the data is transmitted/received as
soon as the SSPxBUF register is written to. If the SPI
is only going to receive, the SDOx output could be dis-
abled (programmed as an input). The SSPxSR register
will continue to shift in the signal present on the SDIx
pin at the programmed clock rate. As each byte is
received, it will be loaded into the SSPxBUF register as
if a normal received byte (interrupts and Status bits
appropriately set).

The clock polarity is selected by appropriately
programming the CKP bit of the SSPxCON1 register
and the CKE bit of the SSPxSTAT register. This then,
would give waveforms for SPI communication as
shown in 

, 

, 

 and

, where the MSB is transmitted first. In

Master mode, the SPI clock rate (bit rate) is user
programmable to be one of the following:

• F

OSC

/4 (or T

CY

)

• F

OSC

/16 (or 4 * T

CY

)

• F

OSC

/64 (or 16 * T

CY

)

• Timer2 output/2 

• F

OSC

/(4 * (SSPxADD + 1))

 shows the waveforms for Master mode.

When the CKE bit is set, the SDOx data is valid before
there is a clock edge on SCKx. The change of the input
sample is shown based on the state of the SMP bit. The
time when the SSPxBUF is loaded with the received
data is shown.

SCKx
(CKP = 0

SCKx
(CKP = 1

SCKx
(CKP = 0

SCKx
(CKP = 1

4 Clock
Modes

Input
Sample

Input
Sample

SDIx

bit 7

bit 0

SDOx

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

bit 7

SDIx

SSPxIF

(SMP = 1)

(SMP = 0)

(SMP = 1)

CKE = 1)

CKE = 0)

CKE = 1)

CKE = 0)

(SMP = 0)

Write to
SSPxBUF

SSPxSR to
SSPxBUF

SDOx

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

(CKE = 0)

(CKE = 1)

bit 0