Microchip Technology MA160014 Data Sheet

Page of 560
 2010-2012 Microchip Technology Inc.
DS41412F-page 89
PIC18(L)F2X/4XK22
5.4.5
STATUS REGISTER
The STATUS register, shown in 
, contains
the arithmetic status of the ALU. As with any other SFR,
it can be the operand for any instruction. 
If the STATUS register is the destination for an instruc-
tion that affects the Z, DC, C, OV or N bits, the results
of the instruction are not written; instead, the STATUS
register is updated according to the instruction per-
formed. Therefore, the result of an instruction with the
STATUS register as its destination may be different
than intended. As an example, CLRF STATUS will set
the Z bit and leave the remaining Status bits
unchanged (‘000u u1uu’). 
It is recommended that only BCF, BSF, SWAPF, MOVFF
and MOVWF instructions are used to alter the STATUS
register, because these instructions do not affect the Z,
C, DC, OV or N bits in the STATUS register. 
For other instructions that do not affect Status bits, see
the instruction set summaries in 
 an
.      
5.5
Register Definitions: Status 
Note:
The C and DC bits operate as the borrow
and digit borrow bits, respectively, in
subtraction.
REGISTER 5-2:
STATUS: STATUS REGISTER
U-0
U-0
U-0
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
N
OV
Z
DC
(1)
C
(1)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-5
Unimplemented: Read as ‘0’
bit 4
N: Negative bit 
This bit is used for signed arithmetic (two’s complement). It indicates whether the result was negative 
(ALU MSB = 1).
1
 = Result was negative 
0
 = Result was positive
bit 3
OV: Overflow bit 
This bit is used for signed arithmetic (two’s complement). It indicates an overflow of the 7-bit 
magnitude which causes the sign bit (bit 7 of the result) to change state.
1
 = Overflow occurred for signed arithmetic (in this arithmetic operation) 
0
 = No overflow occurred 
bit 2
Z: Zero bit
1
 = The result of an arithmetic or logic operation is zero
0
 = The result of an arithmetic or logic operation is not zero
bit 1
DC: Digit Carry/Borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)
(1)
1
 = A carry-out from the 4th low-order bit of the result occurred
0
 = No carry-out from the 4th low-order bit of the result
bit 0
C: Carry/Borrow bit (ADDWF, ADDLW, SUBLW, SUBWF instructions)
(1)
1
 = A carry-out from the Most Significant bit of the result occurred
0
 = No carry-out from the Most Significant bit of the result occurred
Note 1:
For Borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the 
second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high-order or low-order 
bit of the source register.