Microchip Technology DV320032 Data Sheet

Page of 344
PIC32MX330/350/370/430/450/470
DS60001185C-page  252
 2012-2013 Microchip Technology Inc.
26.4.1
CONTROLLING CONFIGURATION 
CHANGES
Because peripherals can be disabled during run time, 
some restrictions on disabling peripherals are needed 
to prevent accidental configuration changes. PIC32
devices include two features to prevent alterations to 
enabled or disabled peripherals:
• Control register lock sequence
• Configuration bit select lock
26.4.1.1
Control Register Lock
Under normal operation, writes to the PMDx registers 
are not allowed. Attempted writes appear to execute 
normally, but the contents of the registers remain 
unchanged. To change these registers, they must be 
unlocked in hardware. The register lock is controlled by 
the PMDLOCK Configuration bit (CFGCON<12>). Set-
ting PMDLOCK prevents writes to the control registers; 
clearing PMDLOCK allows writes.
To set or clear PMDLOCK, an unlock sequence must 
be executed. Refer to Section 6. “Oscillator”
(DS60001112) in the “PIC32 Family Reference 
Manual”
 for details.
26.4.1.2
Configuration Bit Select Lock
As an additional level of safety, the device can be 
configured to prevent more than one write session to 
the PMDx registers. The PMDL1WAY Configuration bit 
(DEVCFG3<28>) blocks the PMDLOCK bit from being 
cleared after it has been set once. If PMDLOCK 
remains set, the register unlock procedure does not 
execute, and the peripheral pin select control registers 
cannot be written to. The only way to clear the bit and 
re-enable PMD functionality is to perform a device 
Reset.