Texas Instruments Hercules TMS570LS04x/03x LaunchPad Evaluation Kit LAUNCHXL-TMS57004 LAUNCHXL-TMS57004 Data Sheet
Product codes
LAUNCHXL-TMS57004
EQEPA
VIM
EQEPINTn
EQEP
Module
I/O
MUX
CTRL
EQEPENCLK
EQEPIO
EQEPI
VBUSP Interface
VCLK
EQEPB
EQEPIOE
EQEPSO
EQEPS
EQEPSOE
NHETnDIS_SEL
EQEP
CLK
GATE
CDDISx.9
VCLK
ACK
CLKSTOP_REQ
SYS_nRST
NHET
VCLK2
nDIS
GIOA[5]
EQEPERR
nEQEPERR
_SYNC
SPNS186A – OCTOBER 2012 – REVISED SEPTEMBER 2013
5.8
Enhanced Quadrature Encoder (eQEP)
shows the eQEP module interconnections on the device.
Figure 5-14. eQEP Module Interconnections
5.8.1
Clock Enable Control for eQEPx Modules
The device level control of the eQEP clock is accomplished through the enable/disable of the VCLK clock
domain for eQEP only. This is realized using bit 9 of the CLKDDIS register. The eQEP clock source is
enabled by default.
domain for eQEP only. This is realized using bit 9 of the CLKDDIS register. The eQEP clock source is
enabled by default.
5.8.2
Using eQEPx Phase Error
The eQEP module sets the EQEPERR signal output whenever a phase error is detected in its inputs
EQEPxA and EQEPxB. This error signal from both the eQEP modules is input to the connection selection
multiplexor. As shown in
EQEPxA and EQEPxB. This error signal from both the eQEP modules is input to the connection selection
multiplexor. As shown in
, the output of this selection multiplexor is inverted and connected to
the N2HET module. This connection allows the application to define the response to a phase error
indicated by the eQEP modules.
indicated by the eQEP modules.
5.8.3
Input Connections to eQEPx Modules
The input connections to each of the eQEP modules can be selected between a double-VCLK-
synchronized input or a double-VCLK-synchronized and filtered input, as shown in
synchronized input or a double-VCLK-synchronized and filtered input, as shown in
Table 5-17. Device-Level Input Synchronization
Input Signal
Control for Double-Synchronized Connection to
Control for Double-Synchronized and Filtered
eQEPx
Connection to eQEPx
eQEPA
PINMMR8[0] = 1
PINMMR8[0] = 0 and PINMMR8[1] = 1
eQEPB
PINMMR8[8] = 1
PINMMR8[8] = 0 and PINMMR8[9] = 1
eQEPI
PINMMR8[16] = 1
PINMMR8[16] = 0 and PINMMR8[17] = 1
eQEPS
PINMMR8[24] = 1
PINMMR8[24] = 0 and PINMMR8[25] = 1
92
Peripheral Information and Electrical Specifications
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