Freescale Semiconductor FRDM-FXS-MULTI-B Data Sheet

Page of 42
MPL3115A2
Sensors
Freescale Semiconductor, Inc.
21
7.1.3
OUT_P_MSB (0x01), OUT_P_CSB (0x02), OUT_P_LSB (0x03), OUT_T_MSB (0x04), 
OUT_T_LSB (0x05)
The Altitude data is stored as a signed fractional 20-bit value in meters in Q16.4 format. The OUT_P_MSB and OUT_P_CSB 
registers contain the integer part in meters and the OUT_P_LSB register contains the fractional part. Left shifting the 
OUT_T_MSB byte by 24 bits into a 32 variable and doing a logical OR with the OUT_T_CSB byte left shifted 16 bits and a logical 
OR with the OUT_T_LSB byte left shifted 8 bits gives the altitude in meters times 65536.
The Pressure data is stored as an unsigned fractional 20-bit value in Pascals in Q18.2 format. The OUT_P_MSB and 
OUT_P_CSB registers and bits 7-6 of the OUT_P_LSB register contain the integer part in Pascals. Bits 5-4 of OUT_P_LSB con-
tain the fractional component. Left shifting the OUT_T_MSB byte by 16 bits into a 32 variable and doing a logical OR with the 
OUT_T_CSB byte left shifted 8 bits and a logical OR with the OUT_T_LSB byte gives the pressure in Pascals times 64.
When RAW bit is set (CTRL_REG1), then the RAW value is stored in all 24 bits of OUT_P_MSB, OUT_P_CSB and 
OUT_P_LSB.
The Temperature data is stored as a signed fractional 12-bit value in °C in Q12.4 format. The OUT_T_MSB register contains 
the integer part in °C and the OUT_T_LSB register contains the fractional part. Left shifting the OUT_T_MSB byte by 8 bits into 
a 16-bit variable and adding the OUT_T_LSB byte with a logical OR gives the temperature in °C times 256. When RAW is se-
lected then the RAW value is stored in all 16 bits of OUT_T_MSB and OUT_T_LSB.
7.1.3.1
Data Registers with F_MODE = 00
The DR_STATUS register, OUT_P_MSB, OUT_P_CSB, OUT_P_LSB, OUT_T_MSB, and OUT_T_LSB are stored in the auto-
incrementing address range of 0x00 to 0x05. This allows the host controller to read the status register followed by the 
20-bit Pressure/Altitude and 12-bit Temperature in a 6-byte, I
2
C transaction.
 
If the FIFO data output register driver is enabled (F_MODE > 00), register 0x01 points to the FIFO read pointer, while registers 
0x02, 0x03, 0x04, 0x05, return a value of zero when read. 
Table 14. OUT_P_MSB Register 
6
5
4
3
2
1
0
R
PD19
PD18
PD17
PD16
PD15
PD14
PD13
PD12
W
Reset
0
0
0
0
0
0
0
0
Table 15. OUT_P_CSB Register
6
5
4
3
2
1
0
R
PD11
PD10
PD9
PD8
PD7
PD6
PD5
PD4
W
Reset
0
0
0
0
0
0
0
0
Table 16. OUT_P_LSB Register
6
5
4
3
2
1
0
R
PD3
PD2
PD1
PD0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
Table 17. OUT_T_MSB Register
6
5
4
3
2
1
0
R
TD11
TD10
TD9
TD8
TD7
TD6
TD5
TD4
W
Reset
0
0
0
0
0
0
0
0
Table 18. OUT_T_LSB Register
6
5
4
3
2
1
0
R
TD3
TD2
TD1
TD0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0