Freescale Semiconductor Tower System Module S12G240 TWR-S12G240 TWR-S12G240 Data Sheet
Product codes
TWR-S12G240
Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual,
Rev.1.23
162
Freescale Semiconductor
2.3
PIM Routing - Functional description
Table 2-4. Signals and Priorities
Port
Pin
Signal
Signals per Device and Package
(signal priority on pin from top to bottom)
Legend
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
G64 / GA64 / G48 / GA48
GN48
GA240 / GA192
G240 / G192
G128 / GA128 / G96 / GA96
G64 / GA64 / G48 / GA48
GN48
GN32 / GNA32
GN16 / GNA16
G64 / G48
GN48
GN32
GN16
GN32
GN16
■ Signal available on pin
❍ Routing option on pin
❏ Routing reset location
Not available on pin
100
64
48
32
20
I/O
Description
-
MODC
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ I
MODC input during
RESET
RESET
BKGD
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ I/O BDM communication
A
[PA7:PA0]
■ ■ ■
I/O GPIO
B
[PB7:PB6]
■ ■ ■
I/O GPIO
XIRQ
■ ■ ■
I
Non-maskable
level-sensitive interrupt
level-sensitive interrupt
[PB5]
■ ■ ■
I/O GPIO
IRQ
■ ■ ■
I
Maskable level- or
falling-edge sensitive
interrupt
falling-edge sensitive
interrupt
[PB4]
■ ■ ■
I/O GPIO
[PB3]
■ ■ ■
I/O GPIO
ECLKX2
■ ■ ■
O
Free-running clock
(ECLK x 2)
(ECLK x 2)
[PB2]
■ ■ ■
I/O GPIO
API_EXTCLK
❏ ❏ ❏
O
API Clock
[PB1]
■ ■ ■
I/O GPIO
ECLK
■ ■ ■
O
Free-running clock
[PB0]
■ ■ ■
I/O GPIO
C
DACU1
■
O
DAC1 output unbuffered
[PC7]
■ ■ ■
I/O GPIO
AMPP1
■
I
DAC1 non-inv. input (+)
[PC6]
■ ■ ■
I/O GPIO
AMPM1
■
I
DAC1 inverting input (-)
[PC5]
■ ■ ■
I/O GPIO
AN15-AN13
❍ ❍
I
ADC analog
[PC4:PC2]
■ ■ ■
I/O GPIO
AN11-AN10
❍ ❍
I
ADC analog
[PC1:PC0]
■ ■ ■
I/O GPIO
D
[PD7:PD0]
■ ■ ■
I/O GPIO