Freescale Semiconductor Tower System Module S12G240 TWR-S12G240 TWR-S12G240 Data Sheet
Product codes
TWR-S12G240
Device Overview MC9S12G-Family
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
71
1.8.3
S12GN48
1.8.3.1
Pinout 32-Pin LQFP
31
PAD3
KWAD3
AN3
—
—
V
DDA
PER1AD/PPS1AD
Disabled
32
PAD11
KWAD11
ACMPM
V
DDA
PER0AD/PPS0AD
Disabled
33
PAD4
KWAD4
AN4
—
—
V
DDA
PER1AD/PPS1AD
Disabled
34
PAD5
KWAD5
AN5
—
—
V
DDA
PER1AD/PPS0AD
Disabled
35
PAD6
KWAD6
AN6
—
—
V
DDA
PER1AD/PPS1AD
Disabled
36
PAD7
KWAD7
AN7
—
—
V
DDA
PER1AD/PPS1AD
Disabled
37
VDDA
VRH
—
—
—
—
—
—
38
VSSA
—
—
—
—
—
—
—
39
PS0
RXD0
—
—
—
V
DDX
PERS/PPSS
Up
40
PS1
TXD0
—
—
—
V
DDX
PERS/PPSS
Up
41
PS2
—
—
—
—
V
DDX
PERS/PPSS
Up
42
PS3
—
—
—
—
V
DDX
PERS/PPSS
Up
43
PS4
MISO0
—
—
—
V
DDX
PERS/PPSS
Up
44
PS5
MOSI0
—
—
—
V
DDX
PERS/PPSS
Up
45
PS6
SCK0
—
—
—
V
DDX
PERS/PPSS
Up
46
PS7
API_EXTCLK
ECLK
SS0
—
V
DDX
PERS/PPSS
Up
47
PM0
—
—
—
—
V
DDX
PERM/PPSM
Disabled
48
PM1
—
—
—
—
V
DDX
PERM/PPSM
Disabled
1
The regular I/O characteristics (see
) apply if the EXTAL/XTAL function is disabled
Table 1-11. 48-Pin LQFP/QFN Pinout for S12GNA16 and S12GNA32
Function
<----lowest-----PRIORITY-----highest---->
Power
Supply
Internal Pull
Resistor
Package Pin
Pin
2nd
Func.
3rd
Func.
4th
Func
5th
Func
CTRL
Reset
State