Freescale Semiconductor MC9S12G128 Evaluation Board TWR-S12G128-KIT TWR-S12G128-KIT Data Sheet
Product codes
TWR-S12G128-KIT
Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual,
Rev.1.23
236
Freescale Semiconductor
2.4.3.45
Port J Pull Device Enable Register (PERJ)
Table 2-70. DDRJ Register Field Descriptions
Field
Description
7-0
DDRJ
Port J data direction—
This bit determines whether the associated pin is an input or output.
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
0 Associated pin configured as input
Address 0x026C (
Access: User read/write
1
1
Read: Anytime
Write: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
PERJ7
PERJ6
PERJ5
PERJ4
PERJ3
PERJ2
PERJ1
PERJ0
W
Reset
1
1
1
1
1
1
1
1
Address 0x026C (
Access: User read/write
7
6
5
4
3
2
1
0
R
0
0
0
0
PERJ3
PERJ2
PERJ1
PERJ0
W
Reset
0
0
0
0
1
1
1
1
Figure 2-45. Port J Pull Device Enable Register (PERJ)
Table 2-71. PERJ Register Field Descriptions
Field
Description
7-0
PERJ
Port J pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
0 Pull device disabled