Freescale Semiconductor MC9S12G128 Evaluation Board TWR-S12G128-KIT TWR-S12G128-KIT Data Sheet

Product codes
TWR-S12G128-KIT
Page of 1292
S12 Clock, Reset and Power Management Unit (S12CPMU)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
395
Table 10-20. Selectable Autonomous Periodical Interrupt Periods
APICLK
APIR[15:0]
Selected Period
0
0000
0.2 ms
1
1
When f
ACLK
is trimmed to 10KHz.
0
0001
0.4 ms
1
0
0002
0.6 ms
1
0
0003
0.8 ms
1
0
0004
1.0 ms
1
0
0005
1.2 ms
1
0
.....
.....
0
FFFD
13106.8 ms
1
0
FFFE
13107.0 ms
1
0
FFFF
13107.2 ms
1
1
0000
2 * Bus Clock period
1
0001
4 * Bus Clock period
1
0002
6 * Bus Clock period
1
0003
8 * Bus Clock period
1
0004
10 * Bus Clock period
1
0005
12 * Bus Clock period
1
.....
.....
1
FFFD
 131068 * Bus Clock period
1
FFFE
 131070 * Bus Clock period
1
FFFF
 131072 * Bus Clock period