Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT Data Sheet
Product codes
TWR-S12GN32-KIT
Timer Module (TIM16B8CV3)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
771
23.3.2.18 Output Compare Pin Disconnect Register(OCPD)
Read: Anytime
Write: Anytime
All bits reset to zero.
23.3.2.19 Precision Timer Prescaler Select Register (PTPSR)
Read: Anytime
Write: Anytime
All bits reset to zero.
Module Base + 0x002C
7
6
5
4
3
2
1
0
R
OCPD7
OCPD6
OCPD5
OCPD4
OCPD3
OCPD2
OCPD1
OCPD0
W
Reset
0
0
0
0
0
0
0
0
Figure 23-28. Output Compare Pin Disconnect Register (OCPD)
Table 23-22. OCPD Field Description
Note: Writing to unavailable bits has no effect. Reading from unavailable bits return a zero.
Field
Description
OCPD[7:0]
Output Compare Pin Disconnect Bits
0 Enables the timer channel port. Output Compare action will occur on the channel pin. These bits do not affect
0 Enables the timer channel port. Output Compare action will occur on the channel pin. These bits do not affect
the input capture or pulse accumulator functions
1 Disables the timer channel port. Output Compare action will not occur on the channel pin, but the output
compare flag still become set.
Module Base + 0x002E
7
6
5
4
3
2
1
0
R
PTPS7
PTPS6
PTPS5
PTPS4
PTPS3
PTPS2
PTPS1
PTPS0
W
Reset
0
0
0
0
0
0
0
0
Figure 23-29. Precision Timer Prescaler Select Register (PTPSR)