Freescale Semiconductor TWR-S12G64 Scalable Platform for Automotive Applications TWR-S12G64-KIT TWR-S12G64-KIT Data Sheet
Product codes
TWR-S12G64-KIT
Device Overview MC9S12G-Family
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
153
1.14
Autonomous Clock (ACLK) Configuration
The autonomous clock
1
(ACLK) is not factory trimmed. The reset value of the autonomous clock trimming
register
2
(CPMUACLKTR) is 0xFC.
1.15
ADC External Trigger Input Connection
The ADC module includes external trigger inputs ETRIG0, ETRIG1, ETRIG2, and ETRIG3. The external
trigger allows the user to synchronize ADC conversion to external trigger events.
trigger allows the user to synchronize ADC conversion to external trigger events.
describes the connection of the external trigger inputs. Consult the
ADC section for information about the analog-to-digital converter module. References to freeze mode are
equivalent to active BDM mode.
equivalent to active BDM mode.
1.16
ADC Special Conversion Channels
Whenever the ADC’s Special Channel Conversion Bit (SC) is set, it is capable of running conversion on a
number of internal channels (see
number of internal channels (see
).
lists the internal reference voltages which are
connected to these special conversion channels.
Table 1-37. Initial WCOP Configuration
NV[3] in
FOPT Register
WCOP in
CPMUCOP Register
1
0
0
1
1. See
2. See
Table 1-38. Usage of ADC Special Conversion Channels
ADC Channel
Usage
Internal_0
V
DDF
1
1
See
”
.
Internal_1
unused
Internal_2
unused
Internal_3
unused
Internal_4
unused
Internal_5
unused
Internal_6
unused
Temperature sense of ADC
hardmacro
2
2
The ADC temperature sensor is only available on S12GA192 and
S12GA240 devices.
S12GA240 devices.
Internal_7
unused