Intel 540 LF80537NE0361M User Manual
Product codes
LF80537NE0361M
R
Specification Update
39
The following figure will be modified to reflect this change:
Figure 12. System Bus Reset and Configuration Timings
BCLK
Reset
Configuration
A[31:3], SMI#,
INIT#
Valid
Tv = T13 (RESET# Pulse Width)
Tw = T45 (Reset Configuration Signals Setup Time)
Tx = T46 (Reset Configuration Signals A[31:3], SMI#, and INIT# Hold Time)
Ty = T47 (Reset Configuration signal BR0# Hold Time)
Tw = T45 (Reset Configuration Signals Setup Time)
Tx = T46 (Reset Configuration Signals A[31:3], SMI#, and INIT# Hold Time)
Ty = T47 (Reset Configuration signal BR0# Hold Time)
Tx
Tv
Tt
Tw
Ty
Valid
Configuration
BR0#
§