Analog Devices AD8260 Evaluation Board AD8260-EVALZ AD8260-EVALZ Data Sheet
Product codes
AD8260-EVALZ
AD8260
Rev. A | Page 5 of 32
Parameter
Conditions
Min
Typ
Max
Unit
ACCURACY
Absolute Gain Error
All gain codes, limits are 3σ
−0.5
±0.15
+0.5
dB
Gain Law Conformance (DNL)
Differential gain error code-to-code
−0.3
±0.15
+0.3
dB
GAIN CONTROL
Gain Step per Code
3.0
dB
Gain Range
Default = −6dB to +24 dB
30
dB
Response Time
30 dB gain change (gain code stepped from 0001 to 1011)
50
ns
LOGIC INTERFACES
High Level Input Voltage
1.4
V
S
V
Low Level Input Voltage
0
0.8
V
Logic Input Bias Current
Logic high, V
LOGIC
= 3.3 V
0.2
μA
Logic low
18
nA
POWER SUPPLY
Supply Voltage
Single supply
3.3
10
V
Dual supply
±3.3
±5
V
Quiescent Current
Full chip enabled (TXEN = 1, ENBL = 1, gain code = 0001)
28.3
mA
TXEN = 0, ENBL = 1, gain code = 0001, driver off, DGA on
19.1
mA
TXEN = 1, ENBL = 1, gain code = 0000, driver on, DGA off
10.8
mA
Chip disabled (TXEN = 0, ENBL = 0, gain code = 0000)
35
µA
V
S
= ±5 V, no signal
34.2
mA
PSRR
Max gain (gain code = 1011), gain = 24 dB, 1 MHz
−30
dB
Driver amplifier, 1 MHz
−48
dB
Power Dissipation
No signal
93
mW
No signal, V
POS
− V
NEG
= 10 V
342
mW
ENABLE TIMES
Chip Enable Time
Bias only, TXEN = 0, gain code = 0000, ENBL = 0 to 1
0.4
µs
All at once, TXEN = 0 to 1, gain code = 0000 to 0001,
ENBL = 0 to 1
ENBL = 0 to 1
0.3
µs
Preamplifier and DGA Enable Time
ENBL = 1, TXEN = 0, gain code = 0000 to 0001
0.3
µs
Driver Enable Time
ENBL = 1, gain code = 0001, TXEN stepped from 0 to 1
0.2
µs
DISABLE TIMES
Chip Disable Time
TXEN = 1 to 0, gain code = 0001 to 0000,
ENBL = 1 to 0, I
SUPPLY
= 100 μA
20
µs
All at once, TXEN = 1 to 0, gain code = 0001 to 0000,
ENBL = 1 to 0, I
ENBL = 1 to 0, I
SUPPLY
= 35 µA
50
µs
Preamplifier and DGA Disable Time
ENBL = 1, TXEN = 0, gain code = 0001 to 0000
0.4
µs
Driver Disable Time
ENBL = 1, gain code = 0000, TXEN = 1 to 0
2.2
µs