Analog Devices ADP5024 Evaluation Board ADP5024CP-EVALZ ADP5024CP-EVALZ Data Sheet
Product codes
ADP5024CP-EVALZ
ADP5024
Data Sheet
Rev. E | Page 14 of 28
2.3
2.8
3.3
3.8
4.3
4.8
5.3
RD
S
ON
(m
Ω)
INPUT VOLTAGE (V)
+125°C
+25°C
–40°C
0
50
100
150
200
250
09888-
033
Figure 33. PMOS RDS
ON
vs. Input Voltage Across Temperature
1.792
1.793
1.794
1.795
1.796
1.797
1.798
1.799
1.800
1.801
1.802
0
0.1
0.2
0.3
V
O
UT
(V)
I
OUT
(A)
–40°C
+25°C
+85°C
+25°C
+85°C
09888-
034
Figure 34. LDO Load Regulation Across Temperature, V
IN3
= 3.6 V, V
OUT3
= 1.8 V
0
0.5
1.0
1.5
2.0
2.5
3.0
2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4
V
IN
(V)
I
OUT
= 300mA
I
OUT
= 150mA
I
OUT
= 100mA
I
OUT
= 1mA
I
OUT
= 10mA
I
OUT
= 100µA
09888-
035
V
O
UT
(V)
Figure 35. LDO Line Regulation Across Output Load, V
OUT3
= 2.8 V
0
0.05
0.10
0.15
0.20
0.25
G
RO
UND CURRE
NT
(
µ
A)
LOAD CURRENT (A)
0
5
10
15
20
25
30
35
40
45
50
09888-
036
Figure 36. LDO Ground Current vs. Output Load, V
IN3
= 3.3 V, V
OUT3
= 2.8 V
2
T
1
CH1
100mV
M 40.0µs A CH2 52.0mA
T
19.20%
BW
CH2 100mA Ω
BW
VOUT
I
OUT
09888-
037
Figure 37. LDO Response to Load Transient, I
OUT3
from 1 mA to 80 mA,
V
OUT3
= 2.8 V
2
3
T
1
CH1 20.0mV
CH3
1.00V
M 100µs
A CH3 4.80V
T
28.40%
VOUT
VIN
09888-
038
Figure 38. LDO Response to Line Transient, Input Voltage from 4.5 V to 5 V,
V
OUT3
= 2.8 V