Analog Devices AD7401A Evaluation Board EVAL-AD7401AEDZ EVAL-AD7401AEDZ Data Sheet
Product codes
EVAL-AD7401AEDZ
EVAL-AD7400A/AD7401A
Rev. 0 | Page 3 of 16
EVALUATION BOARD HARDWARE
POWER SUPPLIES
When using this evaluation board with the EVAL-CED1Z, the
V
V
DD1
and V
DD2
supplies (that is, the isolated and nonisolated
supplies) must be provided by an external source via the J1
and J4 connectors, respectively. The isolated supply, V
and J4 connectors, respectively. The isolated supply, V
DD1
, can
be supplied with a voltage from 4.5 V to 5.25 V while V
DD2
must
be supplied with a 3.3 V supply when used in conjunction with
the EVAL-CED1Z. This is because the EVAL-CED1Z operates
with a 3.3 V logic level. When using the board as a standalone
unit, external supplies must be provided for V
the EVAL-CED1Z. This is because the EVAL-CED1Z operates
with a 3.3 V logic level. When using the board as a standalone
unit, external supplies must be provided for V
DD1
, V
DD2
, and the
op amp supplies. This evaluation board has the following power
supply inputs: V
supply inputs: V
DD1
(+5 V), V
DD2
(+3 V to +5 V), (−5 V), AGND,
and DGND. The (−5 V) supply is only required if the external
op amps are used to buffer the analog inputs to the
or
The supplies are decoupled to the relevant ground plane with
10 μF tantalum and 0.1 μF multilayer ceramic capacitors at the
point where they enter the board.
10 μF tantalum and 0.1 μF multilayer ceramic capacitors at the
point where they enter the board.
The EVAL-AD7400A/AD7401A has split ground planes, that is,
both the isolated and nonisolated side of the device have completely
separate ground planes to preserve the isolation. The board is split
beneath the AD7400A or AD7401A package so that signals on
one side of the AD7400A or AD7401A are completely isolated
from signals on the other side. The EVAL-AD7400A boards
contains the AD7400A in the 8-lead surface mount PDIP
packages with gull wing leads, and the EVAL-AD7401A
board contains the AD7401A in a 16-lead SOIC package.
both the isolated and nonisolated side of the device have completely
separate ground planes to preserve the isolation. The board is split
beneath the AD7400A or AD7401A package so that signals on
one side of the AD7400A or AD7401A are completely isolated
from signals on the other side. The EVAL-AD7400A boards
contains the AD7400A in the 8-lead surface mount PDIP
packages with gull wing leads, and the EVAL-AD7401A
board contains the AD7401A in a 16-lead SOIC package.
LINK OPTIONS
There are seven link options and two solder links that must be
set correctly to select the appropriate operating setup before
using the evaluation board. The functions of the options are
outlined in Table 1.
set correctly to select the appropriate operating setup before
using the evaluation board. The functions of the options are
outlined in Table 1.
Table 1. Link Option Functions
Link No.
Function
J7
This link selects the destination for the MCLKOUT output on the AD7400A and the source of the MCLKIN input on
the AD7401A.
the AD7401A.
In Position A, the MCLKOUT signal on the AD7400A goes to the SPORT connector on the EVAL-CED1Z board. The
MCLKIN signal on the AD7401A is supplied via the SPORT connector by the EVAL-CED1Z board.
In Position B, the MCLKOUT signal on the AD7400A goes to the J5 SMB socket. The MCLKIN input on the AD7401A
must be supplied by an external source via the J5 SMB socket.
MCLKIN signal on the AD7401A is supplied via the SPORT connector by the EVAL-CED1Z board.
In Position B, the MCLKOUT signal on the AD7400A goes to the J5 SMB socket. The MCLKIN input on the AD7401A
must be supplied by an external source via the J5 SMB socket.
J8
This link option selects the destination of the MDAT output signal from the AD7400A or AD7401A.
In Position A, the MDAT signal goes to the SPORT connector on the EVAL-CED1Z board.
In Position B, the MDAT signal goes to the J6 SMB socket.
In Position B, the MDAT signal goes to the J6 SMB socket.
J9
This link option selects the source of the V
DD2
supply (the nonisolated supply) for the AD7400A or AD7401A.
In Position A, V
DD2
must be supplied from an external source via the J4-1 connector.
In Position B, the V
DD2
input on the AD7400A or AD7401A is connected to the 5 V supply from the EVAL-CED1Z. This
connection should not be used because the EVAL-CED1Z operates with a 3.3 V logic level and therefore V
DD2
should
be supplied by 3.3 V from an external source.
In Position C, the V
In Position C, the V
DD2
input on the AD7400A or AD7401A is connected to the 2.5 V supply from the EVAL-CED1Z.
This connection should not be used because the EVAL-CED1Z operates with a 3.3 V logic level and therefore V
DD2
should be supplied by 3.3 V from an external source.
J10
This link option selects the source of the V
IN
+ analog input to the AD7400A or AD7401A.
In Position A, the V
IN
+ analog input to the AD7400A or AD7401A is buffered by the AD797 (U2). This link option
should be used in conjunction with J11, which should be placed in Position A.
In Position B, the V
In Position B, the V
IN
+ analog input to the AD7400A or AD7401A is not buffered by the AD797 (U2). This link option
should be used in conjunction with J11, which should be placed in Position B.
In Position C, the V
In Position C, the V
IN
+ analog input to the AD7400A or AD7401A is tied directly to GND
1
.
J11
This link selects the AD797 (U2) to buffer the analog input from J2 SMB.
In Position A, the analog input signal supplied to the J2 SMB connector is fed directly to the AD797 for buffering.
This link option should be used in conjunction with J10, which should be placed in Position A.
In Position B, the analog input signal supplied to the J2 SMB connector is fed directly to the V
This link option should be used in conjunction with J10, which should be placed in Position A.
In Position B, the analog input signal supplied to the J2 SMB connector is fed directly to the V
IN
+ input of the
AD7400A or AD7401A, therefore it is not buffered. This link option should be used in conjunction with J10,
which should be placed in Position B.
which should be placed in Position B.