Analog Devices AD1940 Evaluation Board EVAL-AD1940AZ EVAL-AD1940AZ Data Sheet

Product codes
EVAL-AD1940AZ
Page of 30
 
SigmaDSP
TM
 28-/56-Bit Audio Processor 
Evaluation Board
 Preliminary Technical Data 
EVAL-AD1940AZ
 
 
Rev. PrA 
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Tel: 781.329.4700 
www.analog.com
 
Fax: 781.461.3113 
©2009 Analog Devices, Inc. All rights reserved. 
EVALUATION BOARD OVERVIEW 
This document explains the design and setup of the AD1940 
SigmaDSP evaluation board. 
The EVAL-AD1940AZ provides a full range of analog and 
digital inputs and outputs to and from the AD1940. The 
SigmaDSP can connect to analog I/O signals through the 
AD1939 codec and AD1974 ADC. Digital I/O connections are 
available in both S/PDIF and 3-wire serial data formats. The 
DSP is controlled by Analog Devices’ SigmaStudio
TM
 software, 
which interfaces to the evaluation boards with a USB cabke via 
the EVAL-ADUSB2EBZ add-on board, also known as the USBi. 
Power is distributed by a single DC supply, which is regulated to 
the necessary voltages on the board. The PCB is an 7” × 5” 4-
layer design with split analog and digital power and ground 
planes on the two inner layers. 
The AD1940 evaluation board should be used for AD1941 
evaluation. There is no AD1941 evaluation board. 
PACKAGE CONTENTS 
The EVAL-AD1940AZ package contains these items: 
•  AD1940 evaluation board 
•  EVAL-ADUSB2EBZ (USBi) communications adapter 
•  6V DC power supply with standard US plug 
•  USB cable with mini-B plug 
•  Evaluation board/software quick-start guide 
•  SigmaStudio software 
OTHER SUPPORTING DOCUMENTATION 
AD1940/AD1941 datasheet 
AD1939 datasheet 
AD1974 datasheet 
SigmaStudio Help (included in the software installation) 
AN-1006: Using the EVAL-ADUSB2EBZ 
 
 
FUNCTIONAL BLOCK DIAGRAM 
AD1940
PERFORMANCE AUDIO
DSP
POWER SUPPLY
REGULATION
AD1939
CODEC
AD1974
ADC
ANALOG OUTPUTS
ANALOG INPUTS
XXXXX-
XXX
INPUT
SIGNAL
ROUTING
JUMPERS
USBi INTERFACE
(USB TO SPI)
S/PDIF RECEIVER
EXTERNAL DIGITAL
(I
2
S/TDM INPUTS)
S/PDIF TRANSMITTER
EXTERNAL DIGITAL
(I
2
S/TDM OUTPUTS)
 
Figure 1. Functional Block Diagram