Atmel Evaluation Kit AT91SAM9260-EK AT91SAM9260-EK Data Sheet

Product codes

AT91SAM9260-EK

SAM9260 [SUMMARY]

6221LS–ATARM–15-Oct-12

6221FS

All new information in

Section 7.2.1 ”Matrix Masters”

Table 7-1, “List of Bus Matrix Masters,”

on page 16

and

Section 7.2.3 ”Master to Slave Access”

Table 7-3, “SAM9260 Masters to

Slaves Access,” on page 16

4457

Figure 2-1 ”SAM9260 Block Diagram” on page 3

, updated EBI signals NRD, NWR0, NWR1,

NWR3.

4431

Added details on Timer/Counter blocks in

Section 10.4.5 “Timer Counter” on page 35

4369

Updated Chip ID in

Section 9.12 “Chip Identification” on page 28

. 4582

6221ES

Updated information on programmable pull-up resistor in

Section 6.4 “PIO Controllers” on page

3972

Updated

Section 6.7 “Slow Clock Selection” on page 14

Table 10-1, “SAM9260 Peripheral Identifiers,” on page 29

, added Note on clocking and

corrected Peripheral Name for PID12, PID13 and PID14.

3504 and
3543

Placed comment on RDY/BUSY with PC13 in

Table 10-4, “Multiplexing on PIO Controller C,”

on page 33

3406

6221DS

Removed references to VDDOSC in

“Features”

, in

Table 3-1, “Signal Description List”

, and in

Section 5.1 “Power Supplies” on page 12

. Corrected VDDPLLA and VDDPLLB with VDDPLL

and GNDPLLA and GNDPLLB with GNDPLL in

Table 4-1, “Pinout for 208-pin PQFP Package,”

on page 10

and in

Table 4-2, “Pinout for 217-ball LFBGA Package,” on page 11

3183

Figure 2-1 on page 3

, corrected range for SCKx pins; label change on matrix block.

3235,
3071

Figure 2-1 on page 3

and

Section 7.3 “Peripheral DMA Controller” on page 17

, removed TWI

PDC channels.

3066

Section 6.3 “Reset Pins” on page 13

, added NRST as bidirectional.

3236

Figure 9-3 on page 27

, added UHPCK as USB Clock Controller output.

3237

Section 10.4.3 “USART” on page 34

, added information on modem signals.

3245

6221CS

For VDDIOP1, added supported voltage levels in

Table 3-1, “Signal Description List,” on

page 4

and corrected supported voltage levels in

Section 5.2 “Power Consumption” on page

2874

Removed package marking and updated package outline information in

Section 4. “Package

and Pinout” on page 9

2922

Change to signal name for pin 147 in

Section 4-1 “Pinout for 208-pin PQFP Package” on page

2907

Inserted new voltage information for JTAGSEL signal in

Table 3-1

“Signal Description List”

and in

Section 6.1 “JTAG Port Pins” on page 13

2947

Table 3-1, “Signal Description List,” on page 4

, added new voltage information for OSCSEL

and TST pins.

2979

Section 6.3 “Reset Pins” on page 13

, new information on NRST and NRTST pins.

3003

Corrected ADC features in

Section 10.4.11 “Analog-to-Digital Converter” on page 36

2923

6221BS

Power consumption figures updated with current values in

Section 5.2 “Power Consumption”

on page 12

Change to signal name for pin 47 in

Section 4-1 “Pinout for 208-pin PQFP Package” on page

2843

6221AS

First issue.

Table 13-1. Revision History - current version appears first

Revision

Comments

Change
Req. Ref.