Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

669

SAM9G25 [DATASHEET]

11032C–ATARM–25-Jan-13

The Timer Counter (TC) includes six identical 32-bit Timer Counter channels.

Each channel can be independently programmed to perform a wide range of functions including frequency 
measurement, event counting, interval measurement, pulse generation, delay timing and pulse width modulation. 

Each channel has three external clock inputs, five internal clock inputs and two multi-purpose input/output signals which 
can be configured by the user. Each channel drives an internal interrupt signal which can be programmed to generate 
processor interrupts.

The Timer Counter block has two global registers which act upon all TC channels. 

The Block Control Register allows the channels to be started simultaneously with the same instruction.

The Block Mode Register defines the external clock inputs for each channel, allowing them to be chained.

 gives the assignment of the device Timer Counter clock inputs common to Timer Counter 0 to 2.

Note:

1.

When Slow Clock is selected for Master Clock (CSS = 0 in PMC Master Clock Register), TIMER_CLOCK5 
input is equivalent to Master Clock.

TIMER_CLOCK1

MCK/2

TIMER_CLOCK2

MCK/8

TIMER_CLOCK3

MCK/32

TIMER_CLOCK4

MCK/128

TIMER_CLOCK5

SLCK