Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet

1281

SAM9X35 [DATASHEET]

11055E–ATARM–10-Mar-2014

Updated 

:

- Master 9 (was ISI DMA; is LCD DMA)
- added Master 11 (Reserved)

: in first sentence, replaced “manages 9 slaves” with “manages 10 slaves”

Updated 

: changed description of Master 9 (was ISI DMA; is LCD DMA)

: changed title (was “Write Protect Registers”) and revised contents

Deleted section “Chip Configuration User Interface” (register CCFG_EBICSA is now found in 

- defined offset 0x002C as reserved
- defined offsets 0x0104–0x011C as reserved
- at offset 0x0120, inserted register CCFG_EBICSA
- defined offsets 0x0124–0x01FC as reserved

: inserted sentence about write protection

: inserted sentence about write protection

- updated register range in Name (was MATRIX_PRAS0...MATRIX_PRAS8; is MATRIX_PRAS0...MATRIX_PRAS9)
- inserted sentence about write protection

- updated register range in Name (was MATRIX_PRBS0...MATRIX_PRBS8; is MATRIX_PRBS0...MATRIX_PRBS9)
- inserted sentence about write protection

: inserted sentence about write protection

: changed reset value from 0x00000000 to 0x00000200; updated 

NFD0_ON_D16 and DDR_MP_EN bit descriptions
Updated 

Updated 

Minor formatting and editorial changes throughout

: replaced bullet “MLC Nand Flash ECC Controller” with “8-bit NAND Flash ECC 

Controller”

: in footnote, replaced instance of “D16-D24” with “D16–D23”

: in second paragraph, replaced instance of “D16-D32” with “D16–D31”

: in first bullet, replaced “Supports MII” with “Supports RMII”

: replaced MII configuration with RMII configuration

: deleted “When reset, it selects the MII mode” from RMII bit description