Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet

587

SAM9X35 [DATASHEET]

11055E–ATARM–10-Mar-2014

Note:

1. It is assumed that this command has been correctly sent (see 

).

2. This field is also accessible in the HSMCI Block Register (HSMCI_BLKR).
The following flowchart (

) shows how to manage read multiple block and write multiple block transfers with

the DMA Controller. Polling or interrupt method can be used to wait for the end of write according to the contents of the
Interrupt Mask Register (HSMCI_IMR).

Send  SELECT/DESELECT_CARD

command

(1)

  to select the card

Send SET_BLOCKLEN command

(1)

 

Write using DMAC

Send WRITE_SINGLE_BLOCK

command

(1)

Configure the DMA channel X
DMAC_DADDRx  = Data Address to write
DMAC_BTSIZE = BlockLength/4

Send WRITE_SINGLE_BLOCK

command

(1)

Read status register HSMCI_SR

Poll the bit

XFRDONE = 0?

Yes

No

Yes

No

Read status register HSMCI_SR

Number of words to write = 0 ?

Poll the bit

TXRDY = 0?

HSMCI_TDR = Data to write

Number of words to write = 
Number of words to write -1

Yes

RETURN

No

Yes

No

Number of words to write = BlockLength/4

DMAC_CHEN[X] = TRUE

Reset theDMAEN bit
HSMCI_DMA &= ~DMAEN
Set the block length (in bytes)
HSMCI_MR |= (BlockLength) <<16)

(2)

Set the block count (if necessary)
HSMCI_BLKR |= (BlockCount << 0)

Set the DMAEN bit
HSMCI_DMA |= DMAEN
Set the block length (in bytes)
HSMCI_BLKR |= (BlockLength << 16)

(2)

RETURN