Atmel Evaluation Kit AT91SAM9X35-EK AT91SAM9X35-EK Data Sheet
Product codes
AT91SAM9X35-EK
953
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
42.8.6 ADC Channel Disable Register
Name:
ADC_CHDR
Address:
0xF804C014
Access:
Write-only
This register can only be written if the WPEN bit is cleared in
.
• CHx: Channel x Disable
0 = No effect.
1 = Disables the corresponding channel.
Warning: If the corresponding channel is disabled during a conversion or if it is disabled then reenabled during a conversion, its
associated data and its corresponding EOC and OVRE flags in ADC_SR are unpredictable.
associated data and its corresponding EOC and OVRE flags in ADC_SR are unpredictable.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
CH11
CH10
CH9
CH8
7
6
5
4
3
2
1
0
CH7
CH6
CH5
CH4
CH3
CH2
CH1
CH0