Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

Product codes
ATSAM4E-XPRO
Page of 1506
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
1094
40.7.43 PWM Channel Period Register
Name:
PWM_CPRDx [x=0..3]
Address:
0x4000020C [0], 0x4000022C [1], 0x4000024C [2], 0x4000026C [3]
Access:
Read/Write
This register can only be written if bits WPSWS3 and WPHWS3 are cleared in the 
.
Only the first 16 bits (channel counter size) are significant.
CPRD: Channel Period 
If the waveform is left-aligned, then the output waveform period depends on the channel counter source clock and can be 
calculated:
– By using the PWM peripheral clock divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32, 64, 
128, 256, 512, or 1024). The resulting period formula will be: 
– By using the PWM peripheral clock divided by one of both DIVA or DIVB divider, the formula becomes, 
respectively: 
 or 
If the waveform is center-aligned, then the output waveform period depends on the channel counter source clock and can 
be calculated:
– By using the PWM peripheral clock divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32, 64, 
128, 256, 512, or 1024). The resulting period formula will be:
– By using the PWM peripheral clock divided by one of both DIVA or DIVB divider, the formula becomes, 
respectively:
 or 
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CPRD
15
14
13
12
11
10
9
8
CPRD
7
6
5
4
3
2
1
0
CPRD
X
CPRD
×
(
)
f
peripheral clock
--------------------------------
CRPD
DIVA
×
(
)
f
peripheral clock
------------------------------------------
CRPD
DIVB
×
(
)
f
peripheral clock
------------------------------------------
2
X
CPRD
×
×
(
)
f
peripheral clock
----------------------------------------
2
CPRD
DIVA
×
×
(
)
f
peripheral clock
---------------------------------------------------
2
CPRD
×
DIVB
×
(
)
f
peripheral clock
---------------------------------------------------