Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

Product codes
ATSAM4E-XPRO
Page of 1506
1123
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
41.14.2   HSMCI Mode Register
Name: HSMCI_MR
Address:
0x40080004
Access: Read/Write
This register can only be written if the WPEN bit is cleared in the 
CLKDIV: Clock Divider
High Speed MultiMedia Card Interface clock (MCCK or HSMCI_CK) is Master Clock (MCK) divided by 
({CLKDIV,CLKODD}+2).
PWSDIV: Power Saving Divider
High Speed MultiMedia Card Interface clock is divided by 2
(PWSDIV)
 + 1 when entering Power Saving Mode.
Warning: This value must be different from 0 before enabling the Power Save Mode in the HSMCI_CR (HSMCI_PWSEN 
bit).
RDPROOF: Read Proof Enable
Enabling Read Proof allows to stop the HSMCI Clock during read access if the internal FIFO is full. This will guarantee data 
integrity, not bandwidth.
0: Disables Read Proof.
1: Enables Read Proof.
WRPROOF: Write Proof Enable
Enabling Write Proof allows to stop the HSMCI Clock during write access if the internal FIFO is full. This will guarantee 
data integrity, not bandwidth.
0: Disables Write Proof.
1: Enables Write Proof.
FBYTE: Force Byte Transfer
Enabling Force Byte Transfer allow byte transfers, so that transfer of blocks with a size different from modulo 4 can be 
supported.
Warning: BLKLEN value depends on FBYTE.
0: Disables Force Byte Transfer.
1: Enables Force Byte Transfer.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CLKODD
15
14
13
12
11
10
9
8
PDCMODE
PADV
FBYTE
WRPROOF
RDPROOF
PWSDIV
7
6
5
4
3
2
1
0
CLKDIV