Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet
Product codes
ATSAM4E-XPRO
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
402
21.4.3.2 Write Commands
Several commands are used to program the Flash.
Only 0 values can be programmed using Flash technology; 1 is the erased value. In order to program words in a
page, the page must first be erased. Commands are available to erase the full memory plane or a given number of
pages. With the EWP and EWPL commands, a page erase is done automatically before a page programming.
page, the page must first be erased. Commands are available to erase the full memory plane or a given number of
pages. With the EWP and EWPL commands, a page erase is done automatically before a page programming.
After programming, the page (the entire lock region) can be locked to prevent miscellaneous write or erase
sequences. The lock bit can be automatically set after page programming using WPL or EWPL commands.
sequences. The lock bit can be automatically set after page programming using WPL or EWPL commands.
Data to be programmed in the Flash must be written in an internal latch buffer before writing the programming
command in EEFC_FCR. Data can be written at their final destination address, as the latch buffer is mapped into
the Flash memory address space and wraps around within this Flash address space.
command in EEFC_FCR. Data can be written at their final destination address, as the latch buffer is mapped into
the Flash memory address space and wraps around within this Flash address space.
Byte and half-word AHB accesses to the latch buffer are not allowed. Only 32-bit word accesses are supported.
32-bit words must be written continuously, in either ascending or descending order. Writing the latch buffer in a
random order is not permitted. This prevents mapping a C-code structure to the latch buffer and accessing the
data of the structure in any order. It is instead recommended to fill in a C-code structure in SRAM and copy it in the
latch buffer in a continuous order.
random order is not permitted. This prevents mapping a C-code structure to the latch buffer and accessing the
data of the structure in any order. It is instead recommended to fill in a C-code structure in SRAM and copy it in the
latch buffer in a continuous order.
Write operations in the latch buffer are performed with the number of wait states programmed for reading the
Flash.
Flash.
The latch buffer is automatically re-initialized, i.e., written with logical 1, after execution of each programming
command. However, after power-up, the latch buffer is not initialized. If only part of the page is to be written with
user data, the remaining part must be erased (written with 1).
command. However, after power-up, the latch buffer is not initialized. If only part of the page is to be written with
user data, the remaining part must be erased (written with 1).
The programming sequence is as follows:
Write the data to be programmed in the latch buffer.
Write the programming command in EEFC_FCR. This will automatically clear the FRDY bit in EEFC_TSR.
When Flash programming is completed, the FRDY bit in EEFC_FSR rises. If an interrupt has been enabled
by setting the bit FRDY in EEFC_FMR, the interrupt line of the EEFC is activated.
by setting the bit FRDY in EEFC_FMR, the interrupt line of the EEFC is activated.
Three errors can be detected in EEFC_FSR after a programming sequence:
Command Error: a bad keyword has been written in EEFC_FCR.
Lock Error: the page to be programmed belongs to a locked region. A command must be run previously to
unlock the corresponding region.
unlock the corresponding region.
Flash Error: when programming is completed, the WriteVerify test of the Flash memory has failed.
Table 21-3.
Flash Descriptor Definition
Symbol
Word Index
Description
FL_ID
0
Flash interface description
FL_SIZE
1
Flash size in bytes
FL_PAGE_SIZE
2
Page size in bytes
FL_NB_PLANE
3
Number of planes.
FL_PLANE[0]
4
Number of bytes in the plane.
FL_NB_LOCK
4 + FL_NB_PLANE
Number of lock bits. A bit is associated
with a lock region. A lock bit is used to
prevent write or erase operations in the
lock region.
with a lock region. A lock bit is used to
prevent write or erase operations in the
lock region.
FL_LOCK[0]
4 + FL_NB_PLANE + 1
Number of bytes in the first lock region.