Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

727

SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14



Configuration fields DSIZE, ALWYS, HALFS and FRSTS in PIO_PCMR can be changed ONLY if the parallel 
capture mode is disabled at this time (PCEN = 0 in PIO_PCMR).



Frequency of peripheral clock must be strictly superior to two times the frequency of the clock of the device 
which generates the parallel data.

1.

Write PIO_PCIDR and PIO_PCIER in order to configure the parallel capture mode interrupt mask.

2.

Write PIO_PCMR to set the fields DSIZE, ALWYS, HALFS and FRSTS in order to configure the parallel 
capture mode WITHOUT enabling the parallel capture mode. 

3.

Write PIO_PCMR to set the PCEN bit to one in order to enable the parallel capture mode WITHOUT 
changing the previous configuration.

4.

Wait for a data ready by polling the DRDY flag in PIO_PCISR or by waiting for the corresponding interrupt.

5.

Check OVRE flag in PIO_PCISR.

6.

Read the data in PIO_PCRHR.

7.

If new data are expected, go to step 

8.

Write PIO_PCMR to set the PCEN bit to zero in order to disable the parallel capture mode WITHOUT 
changing the previous configuration.

1.

Write PIO_PCIDR and PIO_PCIER in order to configure the parallel capture mode interrupt mask.

2.

Configure PDC transfer in PDC registers.

3.

Write PIO_PCMR to set the fields DSIZE, ALWYS, HALFS and FRSTS in order to configure the parallel 
capture mode WITHOUT enabling the parallel capture mode. 

4.

Write PIO_PCMR to set PCEN bit to one in order to enable the parallel capture mode WITHOUT changing 
the previous configuration.

5.

Wait for end of transfer by waiting the interrupt corresponding the flag ENDRX in PIO_PCISR.

6.

Check OVRE flag in PIO_PCISR.

7.

If a new buffer transfer is expected, go to step 

.

0x23

0x34

0x45

0x12

0x56

0x67

0x78

0x89

0x7856_3412

PIODCCLK

PIODC[7:0]

PIODCEN1

PIODCEN2

DRDY (PIO_PCISR)

RDATA (PIO_PCRHR)

0x01

Read of  PIO_PCISR

Peripheral clock