Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

Product codes
ATSAM4E-XPRO
Page of 1506
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
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12.4.3.8  Fault Handling
Faults are a subset of the exceptions, see 
. The following generate a fault:
A bus error on:
̶
An instruction fetch or vector table load
̶
A data access
An internally-detected error such as an undefined instruction 
An attempt to execute an instruction from a memory region marked as Non-Executable (XN)
.
A privilege violation or an attempt to access an unmanaged region causing an MPU fault.
Fault Types 
 shows the types of fault, the handler used for the fault, the corresponding fault status register, and the
register bit that indicates that the fault has occurred. See 
 for more information
about the fault status registers.
Notes:
1. Occurs on an access to an XN region even if the processor does not include an MPU or the MPU is disabled.
2. Attempt to use an instruction set other than the Thumb instruction set, or return to a non load/store-multiple instruction with 
ICI continuation.
Table 12-11.
Faults
Fault
Handler
Bit Name
Fault Status Register
Bus error on a vector read
Hard fault
VECTTBL
Fault escalated to a hard fault
FORCED
MPU or default memory map mismatch:
Memory 
management 
fault
on instruction access
IACCVIOL
on data access
DACCVIOL
during exception stacking
MSTKERR
during exception unstacking
MUNSKERR
during lazy floating-point state preservation
MLSPERR
Bus error:
Bus fault 
during exception stacking
STKERR
during exception unstacking
UNSTKERR
during instruction prefetch
IBUSERR
during lazy floating-point state preservation
LSPERR
Precise data bus error
PRECISERR
Imprecise data bus error
IMPRECISERR
Attempt to access a coprocessor
Usage fault
NOCP
Undefined instruction
UNDEFINSTR
Attempt to enter an invalid instruction set state
INVSTATE
Invalid EXC_RETURN value
INVPC
Illegal unaligned load or store
UNALIGNED
Divide By 0
DIVBYZERO