Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet
Product codes
ATSAM4E-XPRO
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
90
If n is 32, then the value of the result is same as the value in Rm, and if the carry flag is updated, it is updated
to bit[31] of Rm.
to bit[31] of Rm.
ROR with shift length, n, more than 32 is the same as ROR with shift length n-32.
Figure 12-11. ROR #3
RRX
Rotate right with extend moves the bits of the register Rm to the right by one bit; and it copies the carry flag into
bit[31] of the result. See
bit[31] of the result. See
.
When the instruction is RRXS or when RRX is used in Operand2 with the instructions MOVS, MVNS, ANDS,
ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to bit[0] of the register Rm.
ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated to bit[0] of the register Rm.
Figure 12-12. RRX
12.6.3.5 Address Alignment
An aligned access is an operation where a word-aligned address is used for a word, dual word, or multiple word
access, or where a halfword-aligned address is used for a halfword access. Byte accesses are always aligned.
access, or where a halfword-aligned address is used for a halfword access. Byte accesses are always aligned.
The Cortex-M4 processor supports unaligned access only for the following instructions:
LDR, LDRT
LDRH, LDRHT
LDRSH, LDRSHT
STR, STRT
STRH, STRHT
All other load and store instructions generate a usage fault exception if they perform an unaligned access, and
therefore their accesses must be address-aligned. For more information about usage faults, see
therefore their accesses must be address-aligned. For more information about usage faults, see
Unaligned accesses are usually slower than aligned accesses. In addition, some memory regions might not
support unaligned accesses. Therefore, ARM recommends that programmers ensure that accesses are aligned.
To avoid accidental generation of unaligned accesses, use the UNALIGN_TRP bit in the Configuration and Control
Register to trap all unaligned accesses, see
support unaligned accesses. Therefore, ARM recommends that programmers ensure that accesses are aligned.
To avoid accidental generation of unaligned accesses, use the UNALIGN_TRP bit in the Configuration and Control
Register to trap all unaligned accesses, see
.
12.6.3.6 PC-relative Expressions
A PC-relative expression or label is a symbol that represents the address of an instruction or literal data. It is
represented in the instruction as the PC value plus or minus a numeric offset. The assembler calculates the
required offset from the label and the address of the current instruction. If the offset is too big, the assembler
produces an error.
represented in the instruction as the PC value plus or minus a numeric offset. The assembler calculates the
required offset from the label and the address of the current instruction. If the offset is too big, the assembler
produces an error.
&DUU\
)ODJ
&DUU\
)ODJ