Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

Product codes
ATSAM4E-XPRO
Page of 1506
SAM4E [DATASHEET]
Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14
906
38.7.3.12   Framing Error
The receiver is capable of detecting framing errors. A framing error happens when the stop bit of a received
character is detected at level 0. This can occur if the receiver and the transmitter are fully desynchronized. 
A framing error is reported on the FRAME bit of US_CSR. The FRAME bit is asserted in the middle of the stop bit
as soon as the framing error is detected. It is cleared by writing US_CR with the RSTSTA bit to 1.
Figure 38-25. Framing Error Status
38.7.3.13   Transmit Break 
The user can request the transmitter to generate a break condition on the TXD line. A break condition drives the
TXD line low during at least one complete character. It appears the same as a 0x00 character sent with the parity
and the stop bits to 0. However, the transmitter holds the TXD line at least during one character until the user
requests the break condition to be removed. 
A break is transmitted by writing US_CR with the STTBRK bit to 1. This can be performed at any time, either while
the transmitter is empty (no character in either the Shift register or in US_THR) or when a character is being
transmitted. If a break is requested while a character is being shifted out, the character is first completed before the
TXD line is held low. 
Once STTBRK command is requested further STTBRK commands are ignored until the end of the break is
completed.
The break condition is removed by writing US_CR with the STPBRK bit to 1. If the STPBRK is requested before
the end of the minimum break duration (one character, including start, data, parity and stop bits), the transmitter
ensures that the break condition completes. 
The transmitter considers the break as though it is a character, i.e., the STTBRK and STPBRK commands are
taken into account only if the TXRDY bit in US_CSR is to 1 and the start of the break condition clears the TXRDY
and TXEMPTY bits as if a character is processed. 
Writing US_CR with both STTBRK and STPBRK bits to 1 can lead to an unpredictable result. All STPBRK
commands requested without a previous STTBRK command are ignored. A byte written into the Transmit Holding
register while a break is pending, but not started, is ignored.
After the break condition, the transmitter returns the TXD line to 1 for a minimum of 12 bit times. Thus, the
transmitter ensures that the remote receiver detects correctly the end of break and the start of the next character.
If the timeguard is programmed with a value higher than 12, the TXD line is held high for the timeguard period. 
After holding the TXD line for this period, the transmitter resumes normal operations.
 illustrates the effect of both the Start Break (STTBRK) and Stop Break (STPBRK) commands on the
TXD line. 
D0
D1
D2
D3
D4
D5
D6
D7
RXD
Start 
Bit
Parity
Bit
Stop
Bit
Baud Rate
 Clock
Write
US_CR
FRAME
RXRDY
RSTSTA = 1