Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Data Sheet

SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14

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This mode is entered by clearing the WAVE bit in the TC_CMR. 

Capture Mode allows the TC channel to perform measurements such as pulse timing, frequency, period, duty
cycle and phase on TIOA and TIOB signals which are considered as inputs. 

 shows the configuration of the TC channel when programmed in Capture Mode.

Registers A and B (RA and RB) are used as capture registers. This means that they can be loaded with the
counter value when a programmable event occurs on the signal TIOA. 

The LDRA field in the TC_CMR defines the TIOA selected edge for the loading of register A, and the LDRB field
defines the TIOA selected edge for the loading of Register B.

The subsampling ratio defined by the SBSMPLR field in TC_CMR is applied to these selected edges, so that the
loading of Register A and Register B occurs once every 1, 2, 4, 8 or 16 selected edges.

RA is loaded only if it has not been loaded since the last trigger or if RB has been loaded since the last loading of
RA.

RB is loaded only if RA has been loaded since the last trigger or the last loading of RB.

Loading RA or RB before the read of the last value loaded sets the Overrun Error Flag (LOVRS bit) in the TC_SR.
In this case, the old value is overwritten.

When DMA is used, the RAB register address must be configured as source address of the transfer. The RAB
register provides the next unread value from Register A and Register B. It may be read by the 

DMA 

after a request

has been triggered upon loading Register A or Register B.

The PDC can only perform access from timer to system memory.

 illustrates how TC_RA and TC_RB can be loaded in the system

memory without CPU intervention.