Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK Data Sheet

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SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

1.

Read the Channel Handler Status register to choose a free (disabled) channel.

2.

Set up the linked list in memory. Write the control information in the LLI.DMAC_CTRLAx and LLI.DMAC_CTRLBx 
register location of the buffer descriptor for each LLI in memory for channel x. For example, in the register, you can 
program the following: 

1.

Set up the transfer type (memory or non-memory peripheral for source and destination) and flow control 
device by programming the FC of the DMAC_CTRLBx register.

2.

Set up the transfer characteristics, such as:



i. Transfer width for the source in the SRC_WIDTH field.



ii. Transfer width for the destination in the DST_WIDTH field.



iii. Source AHB master interface layer in the SIF field where source resides.



iv. Destination AHB master interface layer in the DIF field where destination resides.



v. Incrementing/decrementing or fixed address for source in SRC_INCR field.



vi. Incrementing/decrementing or fixed address for destination DST_INCR field.

3.

Write the starting destination address in the DMAC_DADDRx register for channel x.

Note:

The values in the LLI.DMAC_DADDRx register location of each Linked List Item (LLI) in memory, although 
fetched during an LLI fetch, are not used. 

4.

Write the channel configuration information into the DMAC_CFGx register for channel x.

1.

Designate the handshaking interface type (hardware or software) for the source and destination peripherals. 
This is not required for memory. This step requires programming the SRC_H2SEL/DST_H2SEL bits, 
respectively. Writing a ‘1’ activates the hardware handshaking interface to handle source/destination 
requests for the specific channel. Writing a ‘0’ activates the software handshaking interface to handle 
source/destination requests.

2.

If the hardware handshaking interface is activated for the source or destination peripheral, assign the hand-
shaking interface to the source and destination peripherals. This requires programming the SRC_PER and 
DST_PER bits, respectively.

5.

Make sure that all LLI.DMAC_CTRLBx register locations of the LLI (except the last) are set as shown in Row 2 of 

, while the LLI.DMAC_CTRLBx register of the last Linked List item must be set as 

. 

 shows a Linked List example with two list items.

6.

Make sure that the LLI.DMAC_DSCRx register locations of all LLIs in memory (except the last) are non-zero and 
point to the next Linked List Item.

7.

Make sure that the LLI.DMAC_SADDRx register locations of all LLIs in memory point to the start source buffer 
address proceeding that LLI fetch.

8.

Make sure that the LLI.DMAC_CTRLAx.DONE field of the LLI.DMAC_CTRLAx register locations of all LLIs in 
memory is cleared.

9.

If source Picture-in-Picture is enabled (DMAC_CTRLBx.SPIP is enabled), program the DMAC_SPIPx register for 
channel x.

10. If destination Picture-in-Picture is enabled (DMAC_CTRLBx.DPIP is enabled), program the DMAC_DPIPx register 

for channel x.

11. Clear any pending interrupts on the channel from the previous DMAC transfer by reading the interrupt status 

register.

12. Program the DMAC_CTRLAx, DMAC_CTRLBx and DMAC_CFGx registers according to Row 2 as shown in 

 

13. Program the DMAC_DSCRx register with DMAC_DSCRx(0), the pointer to the first Linked List item.

14. Finally, enable the channel by writing a ‘1’ to the DMAC_CHER.ENAx bit. The transfer is performed. Make sure 

that bit 0 of the DMAC_EN register is enabled.