Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK Data Sheet
Product codes
AT91SAM9X25-EK
463
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
• TWTR: Internal Write to Read Delay
Reset value is 0.
This field is unique to Low-power DDR1-SDRAM devices and DDR2-SDRAM devices.
This field defines the internal write to read command Time in number of cycles. Number of cycles is between 1 and 7.
• REDUCE_WRRD: Reduce Write to Read Delay
Reset value is 0.
This field reduces the delay between write to read access for low-power DDR-SDRAM devices with a latency equal to 2. To use
this feature, TWTR field must be equal to 0. Important to note is that some devices do not support this feature.
this feature, TWTR field must be equal to 0. Important to note is that some devices do not support this feature.
• TMRD: Load Mode Register Command to Active or Refresh Command
Reset Value is 2 cycles.
This field defines the delay between a Load mode register command and an active or refresh command in number of cycles.
Number of cycles is between 0 and 15.
Number of cycles is between 0 and 15.