Atmel SAM4S-EK2 Atmel ATSAM4S-EK2 ATSAM4S-EK2 Data Sheet
Product codes
ATSAM4S-EK2
610
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
asserted between the two transfers. This might lead to difficulties for interfacing with some serial peripherals requiring the
chip select to be de-asserted after each transfer. To facilitate interfacing with such devices, the Chip Select Register can
be programmed with the CSNAAT bit (Chip Select Not Active After Transfer) at 1. This allows to de-assert systematically
the chip select lines during a time DLYBCS. (The value of the CSNAAT bit is taken into account only if the CSAAT bit is
set at 0 for the same Chip Select).
chip select to be de-asserted after each transfer. To facilitate interfacing with such devices, the Chip Select Register can
be programmed with the CSNAAT bit (Chip Select Not Active After Transfer) at 1. This allows to de-assert systematically
the chip select lines during a time DLYBCS. (The value of the CSNAAT bit is taken into account only if the CSAAT bit is
set at 0 for the same Chip Select).
Figure 32-11.Peripheral Deselection
A
NPCS[0..3]
Write SPI_TDR
TDRE
NPCS[0..3]
Write SPI_TDR
TDRE
NPCS[0..3]
Write SPI_TDR
TDRE
DLYBCS
PCS = A
DLYBCS
DLYBCT
A
PCS = B
B
DLYBCS
PCS = A
DLYBCS
DLYBCT
A
PCS = B
B
DLYBCS
DLYBCT
PCS=A
A
DLYBCS
DLYBCT
A
PCS = A
A
A
DLYBCT
A
A
CSAAT = 0 and CSNAAT = 0
DLYBCT
A
A
CSAAT = 1 and CSNAAT= 0 / 1
A
DLYBCS
PCS = A
DLYBCT
A
A
CSAAT = 0 and CSNAAT = 1
NPCS[0..3]
Write SPI_TDR
TDRE
PCS = A
DLYBCT
A
A
CSAAT = 0 and CSNAAT = 0