Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet
Product codes
AT91SAM9M10-G45-EK
1001
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
42.7.13
PWM Channel Update Register
Name:
PWM_CUPD[0..3]
Addresses:
0xFFFB8210 [0], 0xFFFB8230 [1], 0xFFFB8250 [2], 0xFFFB8270 [3]
Access:
Write-only
This register acts as a double buffer for the period or the duty cycle. This prevents an unexpected waveform when modify-
ing the waveform period or duty-cycle.
ing the waveform period or duty-cycle.
Only the first 16 bits (internal channel counter size) are significant.
31
30
29
28
27
26
25
24
CUPD
23
22
21
20
19
18
17
16
CUPD
15
14
13
12
11
10
9
8
CUPD
7
6
5
4
3
2
1
0
CUPD
CPD (PWM_CMRx Register)
0
The duty-cycle (CDTY in the PWM_CDTYx register) is updated with the CUPD value at the
beginning of the next period.
beginning of the next period.
1
The period (CPRD in the PWM_CPRDx register) is updated with the CUPD value at the beginning
of the next period.
of the next period.