Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

19

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

– A[17] <=> DELAY7[7:4],

– A[18] <=> DELAY7[11:8] 

A25 on PC[12] and A[24:19] on PC[7:2]

– A19 <=> DELAY7[15:12], 

– A20 <=> DELAY7[19:16],...,

– A23 <=> DELAY7[31:28], 

– A24 <=> DELAY8[3:0], 

– A25 <=> DELAY8[7:4]

• PIOA User interface

The delay can only be inserted on the HSMCI0 and HSMCI1 I/O lines, so on

 

 The delay is

controlled by 2 registers, DELAY1 and DELAY2, located in the PIOA user interface.

– PA[2] <=> DELAY1[3:0],

– PA[3] <=> DELAY1[7:4],...,

– PA[8] <=> DELAY1[27:24],

– PA[9] <=> DELAY1[31:28]

– PA[23] <=> DELAY2[3:0],

– PA[24] <=> DELAY2[7:4],...,

– PA[29] <=> DELAY2[27:24],

– PA[30] <=> DELAY2[31:28]

The System Controller is a set of peripherals that allows handling of key elements of the system, such as power,
resets, clocks, time, interrupts, watchdog, etc.

The System Controller User Interface also embeds the registers that configure the Matrix and a set of registers for
the chip configuration. The chip configuration registers configure the EBI chip select assignment and voltage range
for external memories.

The System Controller’s peripherals are all mapped within the highest 16 KBytes of address space, between
addresses 0xFFFF E800 and 0xFFFF FFFF. 

However, all the registers of the System Controller are mapped on the top of the address space. All the registers of
the System Controller can be addressed from a single pointer by using the standard ARM instruction set, as the
Load/Store instruction have an indexing mode of ±4 KB.

 shows the System Controller block diagram.