Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

Product codes
AT91SAM9M10-G45-EK
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SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
31.7.8.6
Header Reception (Slave Node Configuration)
All the LIN Frames start with a header which is sent by the master node and consists of a Synch Break Field,
Synch Field and Identifier Field.
In Slave node configuration, the frame handling starts with the reception of the header.
The USART uses a break detection threshold of 11 nominal bit times at the actual baud rate. At any time, if 11 con-
secutive recessive bits are detected on the bus, the USART detects a Break Field. As long as a Break Field has
not been detected, the USART stays idle and the received data are not taken in account.
When a Break Field has been detected, the flag LINBK in the Channel Status register (US_CSR) is set to “1” and
the USART expects the Synch Field character to be 0x55. This field is used to update the actual baud rate in order
to stay synchronized (see 
). If the received Synch character is not 0x55, an Inconsistent Synch
).
After receiving the Synch Field, the USART expects to receive the Identifier Field. 
When the Identifier Field has been received, the flag LINID in the Channel Status register (US_CSR) is set to “1”.
At this moment the field IDCHR in the LIN Identifier register (US_LINIR) is updated with the received character.
The Identifier parity bits can be automatically computed and checked (see 
).The flags LINID and
LINBK are reset by writing the bit RSTSTA at “1” in the Control register (US_CR).
Figure  31-41.
Header Reception
RXD
Baud Rate
 Clock
te RSTSTA=1
in US_CR
LINID
US_LINIR
LINBK
Start
Bit
1
0
1
0
1
0
1
0
Stop
Bit
Start
Bit
ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7
Break Field
13 dominant bits (at 0)
Stop
Bit
Break
Delimiter
1 recessive bit
(at 1)
Synch Byte = 0x55