Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

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SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

 

0 = The TD line is driven with the default value during the Transmit Frame Sync signal.

1 = SSC_TSHR value is shifted out during the transmission of the Transmit Frame Sync signal.

Determines which edge on frame sync will generate the interrupt TXSYN (Status Register).

Extends FSLEN field. For details, refer to FSLEN bit description on 

0x0

None

Input-only

0x1

Negative Pulse

Output

0x2

Positive Pulse

Output

0x3

Driven Low during data transfer

Output

0x4

Driven High during data transfer

Output

0x5

Toggling at each start of data transfer

Output

0x6-0x7

Reserved

Undefined

0x0

Positive Edge Detection

0x1

Negative Edge Detection